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Programming Model

Programming Model. The basic programming model consists of the following aspects: Registers Instruction Set Addressing Modes Data Types Memory Organization Interrupts and Exceptions. Addressing Modes. The Intel386 DX provides 11 addressing modes for instructions to specify operands.

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Programming Model

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  1. Programming Model • The basic programming model consists of the following aspects: • Registers • Instruction Set • Addressing Modes • Data Types • Memory Organization • Interrupts and Exceptions

  2. Addressing Modes • The Intel386 DX provides 11 addressing modes for instructions to specify operands. • Register Operand Mode: • The operand is locatedin one of the 8-, 16- or 32-bit general registers. • Example : ADD EAX,EBX • Immediate Operand Mode: • The operand is includedin the instruction as part of the opcode. • Example : CLI,STI

  3. Addressing Modes • The remaining 9 modes provide a mechanism for specifying the effective address of an operand. • The linear address consists of two components: • the segment base address and • an effective address.

  4. Addressing Modes • The effective address is calculated by using four address elements: • DISPLACEMENT: An 8-, or 32-bit immediate value • BASE: The contents of any general purpose register. It is generally used by compilers to point to the start of the local variable area. • INDEX: The contents of any general purpose register except for ESP. The index registers are used to access the elements of an array, or a string of characters. • SCALE: The index register's value can be multiplied by a scale factor, either 1, 2, 4 or 8. Scaled index mode is especially useful for accessing arrays or structures.

  5. Addressing Modes • Combinations of these 4 components make up the 9 additional addressing modes  • The effective address (EA) of an operand is calculated according to the following formula: EA = Base Register+ (Index Register * Scaling) + Displacement. • This calculation can be shown as follows:

  6. Addressing Modes

  7. Addressing Modes • Direct Mode: • The operand's offset is contained as part of the instruction as an 8- or 32-bit displacement. • Example: INC Word PTR [500]

  8. Addressing Modes • Register Indirect Mode: • A base register will contain the address of operand • Example: MOV [ECX], EDX

  9. Addressing Modes • Based Mode: • A BASE register's contents is added to a DISPLACEMENT to form the operands offset. • Example: MOV ECX, [EAX+24]

  10. Addressing Modes • Index Mode: • An INDEX register's contents is added to a DISPLACEMENT to form the operands offset. EXAMPLE: ADD EAX, TABLE[ESI]

  11. Addressing Modes • Scaled Index Mode: • An INDEX register's contents is multiplied by a scaling factor which is added to a DISPLACEMENT to form the operands offset. • Example: IMUL EBX, TABLE[ESI*4],7

  12. Addressing Modes • Based Index Mode: • The contents of a BASE register is added to the contents of an INDEX register to form the effective address of an operand. • Example: MOV EAX, [ESI] [EBX]

  13. Addressing Modes • Based Scaled Index Mode: • The contents of an INDEX register is multiplied by a SCALING factor and the result is added to the contents of a BASE register to obtain the operands offset. • Example: MOV ECX, [EDX*8] [EAX]

  14. Addressing Modes • Based Index Mode with Displacement: • The contents of an INDEX Register and a BASE register's contents and a DISPLACEMENT are all summed together to form the operand offset. • Example: ADD EDX, [ESI] [EBP+00FFFFF0H]

  15. Addressing Modes • Based Scaled Index Mode with Displacement: • The contents of an INDEX register are multiplied by a SCALING factor, the result is added to the contents of a BASE register and a DISPLACEMENT to form the operand's offset. • EXAMPLE: MOV EAX, LOCALTABLE[EDI*4] [EBP+80]

  16. Programming Model • The basic programming model consists of the following aspects: • Registers • Instruction Format • Addressing Modes • Data types • Memory organization and segmentation • Interrupts and Exceptions

  17. Data Types • The Intel386 DX supports all of the data types commonly used in high level languages: • Bit: A single bit quantity. • Bit Field: A group of upto 32 contiguous bits, which spans a maximum of four bytes.

  18. Data Types • Bit String: A set of contiguous bits, on the Intel386 DX bit strings can be up to 4 gigabits long. • Byte: A signed 8-bit quantity

  19. Data Types • Unsigned Byte: An unsigned 8-bit quantity. • Integer (Word): A signed 16-bit quantity. • Long Integer (Double Word): • A signed 32-bit quantity. • All operations assume a 2's complement representation.

  20. Data Types • Unsigned Integer (Word): An unsigned 16-bit quantity. • Unsigned Long Integer (Double Word): An unsigned 32-bit quantity.

  21. Data Types • Signed Quad Word: A signed 64-bit quantity. • Unsigned Quad Word: An unsigned 64-bit quantity.

  22. Data Types • Offset: A 16- or 32-bit offset only quantity which indirectly references another memory location.

  23. Data Types • Pointer: A full pointer which consists of a 16-bit segment selector and either a 16- or 32-bit offset.

  24. Data Types • Char: A byte representation of an ASCII Alphanumeric or control character. • String: A contiguous sequence of bytes, words or dwords. A string may contain between 1 byte and 4 GB.

  25. Data Types • BCD: A byte (unpacked) representation of decimal digits 0±9. • Packed BCD: A byte (packed) representation of two decimal digits 0±9 storing one digit in each nibble.

  26. Data Types • When 80386 DX is coupled with 387 Numeric Coprocessor then the following common floating point types are supported. • Floating Point: A signed 32-, 64-, or 80-bit real number representation.

  27. Programming Model • The basic programming model consists of the following aspects: • Registers • Instruction Format • Addressing Modes • Data types • Memory Organization and Segmentation • Interrupts and Exceptions

  28. Memory Organization and Segmentation

  29. Introduction • Memory is divided into bytes, words and dwords. • Words are stored in two consecutive bytes and dwords in 4 consecutive bytes • It supports larger units of memory: pages and segments. • Segmentation: Memory is divided into one or more variable length segments which can be swapped to disk or shared between programs.

  30. Introduction • Paging: Memory is organized into one or more 4KB pages. • Segmentation and Paging can be combined to gain advantages of both systems. • Segmentation is used for organizing memory in logical modules • Pages are useful for system programmer for managing physical memory of system.

  31. Address Spaces • 80386DX has three distinct address spaces: • Logical(Virtual) Address: • It consists of a selector and an offset • Selector : contents of segment register • Offset : Effective address (sum of base, index and displacement) • Each task has maximum of 16K selectors (214) and offset can be 4GB(232) to give a total of 246 or 64TB

  32. Address Spaces • Linear Address • Segmentation unit translates logical address space into 32-bit linear address space. • If there is no paging linear address will be the physical address • Physical Address • Paging unit translates linear address space to physical address space • It is what appears on address pins.

  33. Address Spaces

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