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ECL FINESSE status

ECL FINESSE status. Vladimir Zhulanov BINP, Russia 2008.07.04. Algorithm details. Reconstruction options. ADC data  amplitude reconstruction is needed somewhere In FINESSE In COPPER In event builder. Hardware data processing. Advantages:

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ECL FINESSE status

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  1. ECL FINESSE status Vladimir Zhulanov BINP, Russia 2008.07.04

  2. Algorithm details

  3. Reconstruction options ADC data  amplitude reconstruction is needed somewhere • In FINESSE • In COPPER • In event builder

  4. Hardware data processing Advantages: • Low data amount transferred from FINESSE to COPPER • Low processing load of the COPPER CPU Disadvantages: • Inflexible realization – the algorithm must be strictly defined and intensively tested

  5. FPGA overall design DDR 1 DDR 2 FPGA DSP ADC DATA PROCESSOR + buffer for 320 samples * 64 channel TKO1 TKO2 COPPER EVENT DATA FIFO TKO3 PACKAGER TKO4 TTRX THREAD CONTROLLER

  6. Output data format

  7. Output data format (cont.)

  8. ECL FINESSE initialization • Load driver (once after COPPER boot up): insmod cprfin_ecl.o • Load firmware (once after COPPER boot up): cp he2932.bin /dev/copper/ecl_conf:[ab|cd] • Load DSP coefficients and supplement settings:cp dspfile.ecldsp /dev/copper/ecl_dsp:[ab|cd] • Setup other parameters:user_soft/ecl_setup [ab|cd]or using library cprfin_ecl_lib. The initialization is made via ioctl() calls

  9. ECL FPGA settings There are several kinds of FPGA parameters: • parameters and coefficients concerning DSP – special file • parameters of the synchronization with TKO modules and ADC work. • Masks for DSP and RAW ADC DATA – they must be changed for local run and luminosity run • Decimation factor Fd– how often FPGA stores raw ADC data. Can be set from 1/1 to 1/107

  10. Cosmics reconstruction Reconstruction in FPGA is equal software reconstruction

  11. Reconstructed pedestal

  12. Reconstructed amplitude

  13. Comparition of reconstructed time for 2 channels

  14. Status • The hardware implementation of DSP algorithm is fully debugged (no evidence against that). The hardware result of over then 80000 cosmics events matched sofware version of DSP restoration algorithm. • There are 5 FINESSEs and 8 Shapers ready – That’s enough to serve 1/8 of backward endcap

  15. Installation of new electronics BELLE DAQ 8 Shapers-ADC, located outside of radioactive area roecl01 120 CsI crystalls and Premps of 1/8 of backward endcap Copper with 2 ECL FINESSEs in EFC crate in electronic hut We are going to replace part of current electronics

  16. Current activity • Debugging the ECL DAQ software left by Kiyama.

  17. To do • Install the new new electronics for 1/8 of backward endcap (120 crystalls) • Test data pass to BELLE DAQ • Check hardware DSP implementation and consistency of read out data on cosmics • Measure real noise and coherent noise • Test of DAQ reliability (with and without parallel readout from FASTBUS part of ECL) – tune related software • Measure maximum capable trigger rate • We hope the new electronics and new DAQ will be tested with beam data at October!!!

  18. Thank you for your attention

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