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Image “Padding” In Limited-Memory FPGA Systems

Image “Padding” In Limited-Memory FPGA Systems. MAPLD 2005 Conference Presentation. William Turri (wturri@systranfederal.com) Ken Simone (kcsim07@yahoo.com) Systran Federal Corp. 4027 Colonel Glenn Highway, Suite 210 Dayton, OH 45431-1672 937-429-9008 x104. Research Requirements.

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Image “Padding” In Limited-Memory FPGA Systems

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  1. Image “Padding” In Limited-Memory FPGA Systems MAPLD 2005 Conference Presentation William Turri (wturri@systranfederal.com) Ken Simone (kcsim07@yahoo.com) Systran Federal Corp. 4027 Colonel Glenn Highway, Suite 210 Dayton, OH 45431-1672 937-429-9008 x104

  2. Research Requirements • Develop an efficient means of managing large (512 MB to 1 GB) raw SAR images in memory, for wavelet-based compression on an FPGA • Minimize the number of read/write operations required to perform a wavelet transform • Preserve quality and avoid creating artifacts

  3. SAR Compression Background • What are we compressing? • Collections of SAR data in a raw, unprocessed format, collected by a sensor and stored in contiguous memory • Why are we compressing it? • Raw SAR images can be up to 1 GB in size, and must be compressed to facillitate transmission to airborne platforms to ground-based processing stations • How are we compressing it? • Wavelet transforms have proven effective for compressing many kinds of images, including SAR. Research has identified the 5/3 Wavelet Transform as well-suited to raw SAR data

  4. Wavelet Transform Background Original Image Row Transformed Image 0 … n-1 0 (n/2) n-1 k k+(n/2)

  5. 5/3 Wavelet Filters Low pass filter uses 5 taps High pass filter uses 3 taps

  6. Filter Equations • The preceding transform may be represented by the following algorithms, and we may identify the data points (k indices) required to perform a computation (assume N = 32 and k ranges from 0 to 15) High-Pass Low-Pass d1(k) needs [2k, 2k+2, 2k+1] k = 0 => [0, 1, 2] k = 15 => [30, 31, 32] r1(k) needs [2k-2, 2k-1, 2k, 2k+1, 2k+2] k = 0 => [-2, -1, 0, 1, 2] k = 15 => [28, 29, 30, 31, 32] Index lies beyond the upper bound of N Indices lie beyond the lower and upper bounds of N

  7. Need for “Extension” …and so must this value. Extension minimizes the degradation along the image borders, resulting from the wavelet transform being used. These values must be supplied through some form of extension…

  8. Extension Options Odd-Symmetric … c b a b c x y z y x Even-Symmetric … b a a b c x y z z y Periodic … x y a b c x y z a b For the integer 5/3 transform, Odd-Symmetric extension gives the best numerical results

  9. Values Needed for Odd-Symmetric Extension c b a b c w x y z y …and so must this value. These values must be supplied through some form of extension…

  10. Possible Odd-Symmetric Approaches • Extended pixels could be added to the image array in memory and fetched normally • Fetching extended values through additional memory read operations will result in unnecessary delays in processing • Storing additional values will unnecessarily consume available memory • The extended values could be “fetched” by reading the same value twice when processing boundary coefficients • This presents the same problem of creating unnecessary delays by introducing additional memory read operations • Additional logic dedicated to processing the boundary coefficients could be added to the hardware • Must consume minimal resources and not slow the system when processing non-boundary coefficients • Should account for the extended coefficients based on mathematical operations, if possible, rather than having to create additional stored values

  11. Left-Side Extension for r1 For k = 0, these values must be generated through extension, giving…

  12. Right-Side Extension for d1 For we get: This value must be generated through extension, giving… generalized

  13. Final Equations For k = 0: For k = 1 to (N/2 – 2): These rational forms of the equations were chosen because they best suit our hardware design For k = (N/2 – 1):

  14. Hard-wired right shift by 1 (divide by 2) Top-Level Hardware d1(k) d1(k-1) (registered) Hard-wired right shift by 2 (divide by 4)

  15. r1Hardware d1(k) When k = 0, MUX passes d1(k) to the ADD8, giving and performing extension. Otherwise, MUX passes d1(k-1) to the ADD8, giving d1(k-1)

  16. d1 Hardware r0(2k) When k = (N/2-1), lower MUX passes r0(2k) to the ADD8, giving and performing extension. Otherwise, lower MUX passes r0(2k+2) to the ADD8, giving r0(2k+2)

  17. Results of Extension • Incorporating odd-periodic extension into the hardware involved only two minor changes from a system that does not incorporate extension • Increase from a 3-to-1 MUX to a 4-to-1 MUX to accommodate d1 extension • Addition of a 2-to-1 MUX to accommodate r1 extension • Impact on resource consumption and timing characteristics is minimal

  18. Summary and Suggestions • Adding odd-symmetric extension through dedicated hardware effectively met our research goal with minimal impact on performance • Similar approach could be used with other wavelet transforms, with similar anticipated results • Similar approach could be used with the other forms of extension (even-symmetric and periodic)

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