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GPS-INS resampling & regularization

GPS-INS resampling & regularization. Midterm Presentation Annual project Winter semester תש"ע ( (2009. Students: Oren Hyatt, Alex Dutov Supervisor: Mony Orbach. Abstract. Problem: A GPS system isn’t fast enough, to meet updating requirements of high speed systems.

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GPS-INS resampling & regularization

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  1. GPS-INSresampling & regularization Midterm PresentationAnnual projectWinter semesterתש"ע ((2009 Students: Oren Hyatt, Alex Dutov Supervisor: MonyOrbach

  2. Abstract • Problem: A GPS system isn’t fast enough, to meet updating requirements of high speed systems. • Solution: Implementation of a system that integrates GPS, INS, and a particles filter.

  3. Project’s goals • Implementation of the resampling & regularization parts. • Interface with the other parts of the system. • Meet hardware\software requirements (see specs.).

  4. Milestones for Project A Logical validation. Resampling & regularization integration Timing simulation On board debugging

  5. What has been done? • Learning algorithm. • Learning environment (except of Stratix III). • Initial Design (Block diagrams). • Implementation Beginning.

  6. Resampling diagram Xp[1..30K]x17 c_index CUMSUM memory (30Kx32=117KB) Resampling index U>C? ready W[1..30K] next_U RANDOM (rand_current,rand_next) Uj,Uj+1 Memory (17x32=68Byte) rand_next I/O W: weights vector; Xp:particles vector; Xp_new: resampledXp; Local variables U: Number to compare with C: C[i]=w1+…+wi; enable en_seed seed Control signals enable: calls rand(); en_seed: calls srand(seed); rand_next: protocol between RANDOM and U; ready: index ready for resampling; next_U: calculate next U; reg_init: regularization’s initialization; reg_init Xp_new[1..17]x32

  7. Regularization diagram cov matrix [30Kx30K] buffer Particles Regularization Angles’ normalization [-pi,+pi] Xp_new[1..17]x32 buffer Hopt RANDOM (~Gauss) Converting Euler’s angles to quaternians (LUT of cos/sin) reg_init I/O Xp_new: resampledXp; Cov matrix: covariance matrix; Xp_reg: regulated Xp_new; Control signals reg_init: initial random Regulated Xp_reg[1..30K]x17

  8. Software\Hardware requirements Using VHDL, the project would be implemented on FPGA board: Gidel’sStratix III PROCStar 110. Project will enable system’s output every 10[msec]. I/O: parallel Input/output, values transmitted one by one.

  9. Software\Hardware requirements • Input: particles (30K x 440bits) & weights vector (30K x28bits) every 50 [ns], covariance matrix (17x17 bits). • Output: revalued and normalized particles and weights vector (same sizes). • The board will communicate with the other parts of the system, using a predefined protocol.

  10. Gantt

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