Introduction to Micro Controllers & Embedded System Design Microprocessor/Microcontroller

1. Introduction to Micro Controllers&Embedded System DesignMicroprocessor/Microcontroller Department of Electrical & Computer Engineering Missouri University of Science & Technology hurson@mst.edu A.R. Hurson

2. Microprocessor: a general purpose computer that is contained in a single integrated circuit (all peripherals are off the CPU chip). In another words, it is a CPU on chip. • A system designer using a microprocessor must add memory, I/O devices, … on need basis, externally. • Examples include Intel’s x86 family, Motorola’s 860x0 family, … A.R. Hurson

3. A sample microprocessor • Block diagram of the architecture of the Z80 microprocessor showing: the arithmetic and logic section, register file, control logic section, and buffers to external address and data lines. A.R. Hurson

4. A sample microprocessor • Z80 Architecture A.R. Hurson Source: https://en.wikipedia.org

5. Originally, the concept of microprocessor introduced in early 70s (4-bit Intel 4004) • As the technology advanced and chip density increased, so did the functionality and complexity of a microprocessor. • Word size changed from 4-bit to 64-bit, • Floating point operations were added, and • CPU caches were introduced. A.R. Hurson

6. Microcontroller: A microprocessor with a number of integrated peripherals, typically used in control-oriented applications (everything is on one chip). • Typically, it contains a CPU (could be more than one), memory, and I/O peripherals. • Microcontrollers are designed for embedded applications. A.R. Hurson

7. General architecture of a Microcontroller A.R. Hurson Source: elprocus.com

8. General architecture of a Microcontroller • CPU: Central Processing Unit • RAM: Random Access Memory • ROM: Read Only Memory • I/O ports: Parallel I/O port and Serial I/O port • ADC: Analog to Digital Converter and Digital to Analog Converter • Timers: to be used for various functions such as, lock functions, modulations, pulse generation, … • Interrupt A.R. Hurson

9. Embedded systems: An embedded system is a computer system with a dedicated functionality within a larger mechanical or electrical system, often with real-time computing constraints. • It is embedded as part of a complete device often including hardware and mechanical parts. • Embedded systems control many devices in common use today. • Ninety-eight percent of all microprocessors are manufactured as components of embedded systems. A.R. Hurson Source: https://en.wikipedia.org

10. Embedded systems • Compared to general-purpose computers, typically embedded computers are low power consumption, small size, rugged operating ranges, and low per-unit cost. • These advantages comes at the cost of limited processing capabilities, which make them significantly more difficult to program and to interact with. • Embedded systems are commonly found in consumer, cooking, industrial, automotive, medical, commercial, and military applications. A.R. Hurson

11. Attributes of Embedded devices • Embedded system is something that was not designed to be general purpose, • Embedded devices are usually tuned for one or a few applications, • Most embedded devices embody the capability they perform, • Embedded systems are often commodities rather than capital items themselves, • Embedded systems are devices users purchase for a reason that is not thought of as “computing”. A.R. Hurson

12. Block diagram of a microprocessor/microcontroller system C PU Address bus (16 lines) Data bus (8 lines) Control bus (6 lines) Interface circuitry RAM ROM Peripheral devices A.R. Hurson

13. Intel 8051 family A.R. Hurson

14. Features of various Intel microcontroller A.R. Hurson

15. Features of MCS-51 A.R. Hurson

16. Serial device Parallel device External clocks External interrupts • Detailed block diagram of a microprocessor/microcontroller Internal clocks C PU Serial interface Parallel interface Interrupt control Timer Address, data, and control buses RAM ROM A.R. Hurson

17. Central Processing Unit: Monitors and controls all operations performed. On the microcontroller. It reads program instructions from ROM memory and executes them. A.R. Hurson

18. Interrupts • It is a subroutine call that interrupts (pauses) the Intel 8051’s main operations or work and causes it to execute any other  program, which is more important at the time of operation. • Generally five interrupt sources are recognized in 8051 Microcontroller. • When a subroutine is completed, the execution of main program resumes. A.R. Hurson

19. Memory • ReadOnlyMemory(ROM) or program memory is 4K bytes. • Random Access Memory (RAM) or data memory is 128 bytes. A.R. Hurson

20. BUS • Address Bus is a 16-bit bus to address memory location • Data Bus is an 8-bit bus to transfer data A.R. Hurson

21. Input/Output Port: Intel 8051 has four 8-bit parallel and one serial I/O ports. A.R. Hurson

22. VCC 40 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 32 33 34 35 36 37 38 39 19 XTL1 RD WR T1 T0 INT1 INT0 TXD RXD Pin Configuration 18 XTL2 29 30 31 9 PSEN P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 8 7 6 5 4 3 2 1 ALE EA RST 17 16 15 14 13 12 11 10 P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 A15 A14 A13 A12 A11 A10 A9 A8 P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 28 27 26 25 24 23 22 21 20 A.R. Hurson VSS

23. Port0 (Pins 32 to 39) is a dual-purpose port. In minimum configuration design, it is a general purpose I/O port. For larger designs with external memory, it becomes a multiplexed address and data bus. • Port1 (Pins 1 to 8) is a dedicated I/O port and available to external devices as required. In 8032/8052 configurations, P1.0 and P1.1 are used either as I/O lines or as an external inputs to the third timer. • Port2 (Pins 21 to 28) is also a dual-purpose port serving as general purpose I/O or as the high byte of the address bus for designs with external code memory or more than 256 bytes of external data memory. A.R. Hurson

24. Port3 (Pin 10 to 17) is another dual purpose port. It is either a general purpose I/O or they are multifunctional, each having alternate purpose as follows: A.R. Hurson

25. Program Store Enable (Pin 29) is a co troll signal that enables external program memory (note: 8051 has four dedicated control signals). It is usually connected to an EPROM output enable pin. • PSEN signal pulses low during the fetch cycle of an instruction stored in external program memory. The op.code is read from memory, travels across data bus, and latches into instruction register for decoding. When executing program from internal ROM memory PSEN remains in inactive (high) state. A.R. Hurson

26. Address Latch Enable (Pin 30) is used de-multiplexing the address and data bus when port 0 is used in its alternate modes (i.e., as the data bus and the low-byte of the address bus). • ALE is the signal that latches the address into an external register during the 1st half of a memory cycle. Then the port 0 lines are available for data input or output during the 2nd half of the memory cycle when data transfer takes place. A.R. Hurson

27. External Access (Pin 31) is generally tied high (+5 volts) or low (ground). If high the 8051/8052 executes programs from internal ROM memory. If low, programs execute from external memory only. • On-chip Oscillator inputs (Pins 18 & 19) − These pins are used for interfacing an external crystal to get the system clock. A.R. Hurson

28. Reset(Pin 9) is the master RESET for 8051. When this signal is high for at least two machine cycles, the 8051 internal registers are loaded with initial values in an orderly system start-up. For normal operation, RST is low. • Power connection (Pines 20 & 40) 8051 operate from a signal +5 volts supply. The Vcc connection is on pin 40 and Vss connection (ground) is on pin 20. A.R. Hurson

29. Memory organization • Most microprocessors like other computers use a random access memory for both programs and data (i.e., stored program machine). This is not the case for microcontroller systems (say why?). • In case of 8051/8052 internal memory consists of on-chip ROM (program memory) and on-chip RAM (data memory). • The on-chip RAM contains a rich arrangement of general-purpose storage, bit addressable storage, register banks, and special function registers. A.R. Hurson

30. Memory organization • Note: Registers and Input/Output ports are memory mapped and accessible like any other memory location. • Stack resides within the internal RAM. A.R. Hurson

31. Memory organization • In general, RAM memory can be partitioned into three groups: • 32 bytes from locations 00H to 1FH are register banks and stack. These 32 bytes are divided into four banks of registers. • 16 bytes from locations 20H to 2FH are bit addressable memory. • 80 bytes from locations 30H to 7FH are scratch pad memory. This section is used for the purpose of storing data and parameters by the programmers. A.R. Hurson

32. Byte address • Memory organization 7F 30 2F 20 1F 18 17 10 0F 08 07 00 General purpose RAM Bit addressable locations Bank3 Bank2 Bank1 A.R. Hurson Bank0

33. Byte address Byte address 90 8D 8C 8B 8A 89 88 87 83 82 81 80 P1 TH1 TH0 TL1 TL0 TMOD TCON PCON DPH DDL SP P0 FF F0 E0 D0 B8 B0 A8 A0 99 98 B ACC PSW IP P3 IE P2 SBUF SCON A.R. Hurson

34. Memory organization • Example: State the contents of RAM locations after execution of the following sequence of instructions. MOV R0, #99H ; Load R0 with value 99H MOV R1, #85H ; Load R1 with value 85H MOV R2, #3FH ; Load R2 with value 3FH MOV R7, #63H ; Load R7 with value 63H MOV R5, #12H ; Load R5 with value 12H RAM location 0 has value 99H RAM location 1 has value 85H RAM location 2 has value 3FH RAM location 7 has value 63H RAM location 5 has value 12H A.R. Hurson

35. Memory organization • Example: State the contents of RAM locations after execution of the following sequence of instructions. SETB PSW, 4 ; Select bank2 MOV R0, #99H ; Load R0 with value 99H MOV R1, #85H ; Load R1 with value 85H MOV R2, #3FH ; Load R2 with value 3FH MOV R7, #63H ; Load R7 with value 63H MOV R5, #12H ; Load R5 with value 12H RAM location 10 has value 99H RAM location 11 has value 85H RAM location 12 has value 3FH RAM location 17 has value 63H RAM location 15 has value 12H A.R. Hurson

36. Bit addressable RAM • 8051 has 210 bit addressable locations, of which 128 are at byte addresses 20H through 2FH and the rest are the special function registers. • Bit addressability allows one to set, clear, perform AND, OR, … operations at bit level with a single instruction. This is a powerful feature, otherwise, bit processing should have been done as a sequence of read, modify, and write. Finally, I/O ports are bit addressable, as well. A.R. Hurson

37. Bit addressable RAM • For example: SETB 67H • sets bit 67H, which is the most significant bit of “byte address 2CH”. If bit addressability did not exist, one had to write the following code to accomplish the aforementioned task: MOV A, 2CH ORL A, #10000000B MOV 2CH, A A.R. Hurson

38. Register Banks are located at the lower 32 words of internal RAM memory. The instruction set of 8051 supports 8 registers R0 through R7 which are at addresses 00H-07H. A.R. Hurson

39. Register Banks • Example MOV A, R5 is a byte instruction using register addressing mode. • Similarly, we can perform the same operation using the following instruction: MOV A, 05H which is a 2 byte instruction (since it is using a direct addressing) A.R. Hurson

40. Register Banks • The active register bank can be altered by changing the register bank select bits in the program status word. • Example: Assuming register bank3 is active then, MOV R0, A Writes the content of accumulator into location 18H. A.R. Hurson

41. Special function registers • Internal registers can be implicitly accessed by instructions. • For example INC A increments the accumulator. • There are 21 special function registers located at address 80H to FFH. • Most of the special function registers are accessed via direct addressing. A.R. Hurson

42. Program Status Word is at address D0H and contains status bits as follows: A.R. Hurson

43. Carry flag has a dual purpose: • It is used to hold the carry out (borrow out) for addition (subtraction) operation. • For example, if accumulator has the value FFH then ADD A, #1 sets the accumulator to 00H and sets the carry flag in PSW. • It is also used as a “Boolean accumulator” • For example, ANL C, 25H ANDs bit 25H with the carry flag and places the result back in carry flag. A.R. Hurson

44. Auxiliary carry flag is used when performing BCD operations. • Flag0 is a general-purpose flag bit available for user application. A.R. Hurson

45. Register Bank Select determines the active register bank. • For example: SETB RS1 SETB RS0 MOV A, R7 makes register bank 3 active and moves contents of R7 (at address1FH) to accumulator. A.R. Hurson

46. Overflow flag is set after addition or subtraction operation, if there was an arithmetic overflow (underflow). • For example the following operation 0F + 7F = 8E sets the OV bit. A.R. Hurson

47. Parity bit is automatically set or cleared in each machine cycle to establish even parity of accumulator, i.e., the number of 1s in accumulator plus the P bit is always even. • For example is accumulator contains 10101101, P will be set to 1. A.R. Hurson

48. Example Show the status of CY, AC, and P after the following operations: • 38 00111000 • + 2F 00101111 • 67 01100111 MOV A, #38H ADD A, #2FH CY = 0 ; Since there is no carry out AC = 1 ; Since there is a carry from D3 to D4 P = 1 ; Since accumulator has five 1s (an odd number of 1s) A.R. Hurson

49. Example Show the status of CY, AC, and P after the following operations: • 9C 10011100 • + 64 01100100 • 100 00000000 MOV A, #9CH ADD A, #64H CY = 1 ; Since there is a carry out AC = 1 ; Since there is a carry from D3 to D4 P = 0 ; Since accumulator has 0 1s (an even number of 1s) A.R. Hurson

50. Example Show the status of CY, AC, and P after the following operations: • 88 10001000 • + 93 10010011 • 11B 00011011 MOV A, #88H ADD A, #93H CY = 1 ; Since there is a carry out AC = 0 ; Since there is no carry from D3 to D4 P = 0 ; Since accumulator has 4 1s (an even number of 1s) A.R. Hurson