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Experience from using SRAM based FPGAs in the ALICE TPC D etector and F uture Plans

Experience from using SRAM based FPGAs in the ALICE TPC D etector and F uture Plans. Johan Alme ( johan.alme@hib.no ) – for the ALICE TPC Collaboration FPGA workshop, CERN 21.03.2014. The ALICE detector. Time Projection Chamber. ALICE TPC sub- detector.

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Experience from using SRAM based FPGAs in the ALICE TPC D etector and F uture Plans

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  1. Experience from using SRAM basedFPGAs in the ALICE TPC Detector and Future Plans Johan Alme (johan.alme@hib.no) – for the ALICE TPC Collaboration FPGA workshop, CERN 21.03.2014

  2. The ALICE detector Time Projection Chamber Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  3. ALICE TPC sub-detector • A gasfilledbarrelwith an electricfield and a magneticfield. • Particles from thecollisionreactswiththe gas releasing electrons • Electrons drift in thefields and hit a Multi Wire Proportional Chamber by the end-plates. • ~600 000 charge sensitive padsaremountedontheendplatesofthebarrel. • Electric pulses arehandled by complex readout Electronicslocateddirectlybehindthepadplane. • Close to theLHC beam interactionpoint. • Radiationis a major problem! Lowmultiplicityevent from Run 1 Highmultiplicityevent is completelycrowded Run 2 will have evenhighermultiplicity Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  4. ALICE TPC Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  5. ALICE TPC Readout Electronics in Numbers • 1000 samples/event (10bit) • 4356 * 128 channels • 700MByte/event • 200 Hz/1kHz eventrate • 142-710 GByte/s (Raw) • Data compression:5-20 Gbyte/s (~x30) • Front End Cards • Amplifies/shapesthe signal • Analog to digital conversion • Digital signalprocessing • Buffer data • 216 Readout Control Units • Read data from Front End Card • Sends data over fiber for analysis and permanent storage • 2 SRAM basedFPGAs & 2 flashbasedFPGAs per system In total: 5220 FPGAs & 35064 ASICs Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  6. RCU main FPGA • The RCU main FPGA sits in thedatapath • Data readout is handled by theReadout Node • 92% CLBs • 75% BRAM blocks (Remaining 25% BRAM can not be used due to theActivePartialReconfiguration) • Result: TMR or anyothermitigationtechniquesarenot applicable Readout Node Control Node Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  7. ReconfigurationNetwork (I) • Consistsof: • A radiation tolerant flash memory, a radiation tolerantflash based FPGAand the DCS board– an Embedded PC with Linux. • CorrectsSEUs in theconfigurationmemoryofthe Xilinx Virtex-II pro vp7 • Why it works: • ActivePartialReconfiguration • How it works: • RCU support FPGA reads one frame at the time from the flash memory and Xilinx configuration memory. • The frames are compared bit by bit. • If a difference is found, the faulty frame is overwritten. • Keyword: Flexibility Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  8. Reconfiguration Network (II) • When an SEU is detected it is automaticallycounted • This has given usvaluableinformationontheradiationenvironment • The FaultInjectionTechniquehas beenused in a lab environmentin order to predictthefunctionalfailure rate with different run conditions. Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  9. SEU measurement results from Run 1 • Figures show integratedLuminosity vs. SEU count for four different run periods • All RCUsareincluded • A clear linear dependencecan be seen. Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  10. Cumulative SEU for 2011 pp √s=7 TeV Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  11. Radial and Sectorial Distribution • Higher SEU countnearer to theinteractionpoint. • Data from 2011 pp√s=7 TeV Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  12. What is FaultInjection? • In contextof FPGA design: • Faultinjectionmeansinjectingbitflips in theconfigurationmemoryofthe FPGA. • Purpose: Simulationofradiationrelatedeffects. • Pros: • Lowcost • Simple • Great tool to heightenradiationtolerance during developmentphase • Cons • Sensitivityofthetechnology is not possible to measure • A systematic test including all possible bit-locations takes time • Not all elements in the FPGA can be tested. Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  13. Purpose ofthe ALICE TPC RCU FaultInjection Test • Estimatetheradiationsensitivityofthe RCU main FPGA design • Estimate an expected rate offunctionalfailures in the RCU main FPGA as a functionofintegratedluminocity • Twocategoriesoffunctionalfailuresarerecognized: • Reliabilityfaults: System crashesleading to a stop in the data taking for thecomplete ALICE detector. • Performancefaults: Errors in thedatastream from the RCU experiencing an SEU. GCLK, IOB, IOI & LE BRAM BRAM interconnect Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  14. FaultInjectionResults (I) BRAM IC frames • Numberofbitflipsinjected: 206151 • Coverage6.5% • Xilinx conservativeestimate: SEUPI = 10 SEUs/fault • Resultis in theexpected range • SEUPIReliabilityfaults = ~93.5 SEUs/fault • Most functionalfaultsare not critical for theoperationofthe ALICE detector! • Plot shows bitflipsleading to observableperformancefaults. 12 Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014 TWEPP 2012, Johan Alme

  15. FaultInjectionResults (II) • Equal distribution for each fault type. • 53 SEUs gives*: • >90% risk to get any functional failure • >15% risk to get a reliability fault *Run 2010 (09. Aug 2011): Integrated Luminocity 107.816 nb-1 NumberofSEUs = 107.816 nb-1 * 0.49 SEUs/nb-1 = 52.8 SEUs Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  16. Conclusion – SEU analysis Run 1 • 2011 Pb-Pb run: • Peak Luminocity: 300-400 Hz/b (300 - 400 x 1024 cm-2s-1) • ~5 SEUs/h for all 216 FPGAs • Run 2 scenario*: • Peak luminosity 1 – 4 x 1027cm-2s-1 • 8 – 30 kHz interaction rate • ~45 SEUs/h for all 216 FPGAs • ~0.5 Reliability faults/h • Run 3 Scenario*: • Assuming an interaction rate of 50kHz and a 30% multiplicity increase • ~100 SEUs/h for all 216 FPGAs • ~1 Reliability fault/h • Clearly an upgrade is needed • It does not rule out SRAM based FPGAs • BUT - we would need a larger device with room for mitigation techniques *Assumingnoupgrades to the Electronics Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  17. ALICE TPC Run 2 Upgrades • Wemake a «simple» Upgrade! • Splits a «slow» parallell bus: • Doubles the speed! • Upgrades the RCU –> RCU2 • New «stateofthe art» System on Chip FPGA – Microsemi smartFusion2 • Faster, bigger, better in radiation! • First flashbased FPGA with SERDES Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  18. 1 of 1 RCU2 — The ALICE TPC readout electronics consolidation for Run2 Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  19. Microsemi smartFusion2 – The Perfect Choice? • The Microsemi smartFusion2 is a brand newdevice. • Onlyengineringsampledreleasedwhenwestarted to use it. • A few surprises wereencounteredwiththisnewdevice. • Especially given our positive experiencewithActel/Microsemidevices Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  20. MonitoringofRadiation Levels • On the present RCU we have theReconfiguration Network acting as a radiation monitor • This is an interestingfeature to keep for the RCU2: • Additional SRAM memory and Microsemi proASIC3 250 added to the RCU2 • Not enoughuser-IOsonthe smartFusion2 for thisfeature • Low risk – design already done and proven* • Cypress SRAM – same as used for the latest LHC RadMondevices • Extensively characterized in various beams (n,p,mixed) and compared/benchmarked to FLUKA MC simulations by the CERN EN/STI group * Arild Velure ”Design, implementation and testing of SRAM based neutron detectors”, Master Thesis 2011 Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  21. Irradiation test plans for RCU2 smartFusion2(I) * https://indico.cern.ch/event/152527/material/slides/0 • Oslo Cyclotron (~30 MeVprotons) – April • Preparationof High Energy test at TSL • Single EventUpset Rate in SRAM and at register level • Single EventTransients • This has beenreported to be a potentialproblem in Flash baseddeviceswithincreasingclockfrequency* • Single EventLatchup • We have been informed that Microsemihave observed non-destructive SELs at a low rate • PLL stability Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  22. Irradiation test plans for RCU2 smartFusion2 (II) • TSL Uppsala (180 MeVProtons) – May • Full system test executing all interfaces • Ethernet • SERDES • etc • Redothe Oslo tests withthehigherenergy. TSL Uppsala appartement in 2005 Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  23. Conclusion – Run 2 Upgrades • Weare in an exitingperiod. • The outcomeoftheforthcomingirradiationcampaignsareveryimportant • EarlierexperienceswithActel/Microsemiareverygood in ourradiationenvironment • We hope thatthe smartFusion2 will live up to ourexpectations Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  24. ALICE TPC - Run3 Upgrades • In Run2 only parts ofthe Electronics areupgraded • In Run3 EVERYTHING will be changed • Onlytheempty TPC barrell is left • MWPC  GEM • Run3 demands faster and more radiation tolerant Electronics • High energyhadronflux: ~3.4 kHz/cm2 • Dose < 2.1 krad • 1 MeVneutronequivalentfluence: 3.4 x 1011 cm-2 • The dose and the 1 MeVn.eq. are not at worryinglevels ALICE TPC Technical Design Report: https://cds.cern.ch/record/1622286/ Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  25. Run3 – PlannedReadout Electronics • Conservativeapproach – No FPGAs in theradiationzone • SAMPA – newRadiation tolerant (in ourenvironment) ASIC! • GBTx & Versatile Link– RadiationTolerent ASIC & high speed opticallinks * • CommonReadout Unit – First componentwith FPGA – NOT in radiationzone! * https://espace.cern.ch/GBT-Project/default.aspx ALICE TPC Technical Design Report: https://cds.cern.ch/record/1622286/ Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

  26. Thankyou! K. Røed, J. Alme, and D. Fehlker et al., First measurement of single event upsets in the readout control FPGA of the ALICE TPC detector, Journal of Instrumentation, vol. 6, no. 12, p. C12022, 2011 J. Alme, D. Fehlker, and C. Lippmann et al., Radiation tolerance studies using fault injection on the Readout Control FPGA design of the ALICE TPC detector, Journal of Instrumentation, vol. 8, p. C01053, 2013 K. Røed, J. Alme et al. Single event upsets in the readout control FPGA of the ALICE TPC detector during the first LHC running period, Poster presentation TWEPP 2013 J Alme et al RCU2 — The ALICE TPC readout electronics consolidation for Run2, Journal of Instrumentation, Vol. 8, p. C12032, 2013 Johan Alme (johan.alme@hib.no) for the ALICE TPC Collaboration - FPGA Workshop, CERN 21.03.2014

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