Karen Kirkby, Justin Hamilton Surrey Ion Beam Centre, University of Surrey

1. The role of the Buried Oxide in SOI Structures Dopant Diffusion and Activation Karen Kirkby, Justin Hamilton Surrey Ion Beam Centre, University of Surrey IAEA CRP Chiang Mai2007

2. PhD Students Justin Hamilton, Jim Sharp, Max Kah Post Docs Andy Smith Colleagues at Surrey Roger Webb, Russell Gwilliam, Brian Sealy, Nick Cowern (Newcastle) IRC-irst, Trento Massimo Bersani and Damiano Giubertoni, Salvatore Gennaro Bologna Andrea Parisini Toulouse Fuccio Christiano Applied Materials Erik Collart (UK) Thank you IAEA CRP Chiang Mai2007

3. Introduction Experimental Design Experimental Results SOI Vs Bulk Si Temp Effect of the buried interface Optimisation & Modelling Conclusions Contents IAEA CRP Chiang Mai2007

4. Miniaturisation: why? • Smaller • Faster • Cheaper IAEA CRP Chiang Mai2007

5. Transistor size , device per chip Device down-scaling: Gordon Moore noticed in 1965: number of devices on a chip doubled every 18-24 months & predicted this trend would continue IAEA CRP Chiang Mai2007

6. Silicon wafer with a buried Oxide (BOX) Advantages of SOI over Bulk Si Increased Speed Reduced Power Consumption Increased radiation tolerance Immunity from latch-up Industry is moving towards SOI BOX Si BOX Si Silicon-on-Insulator (SOI) IAEA CRP Chiang Mai2007

7. Down-scaling challenges: Lg S/D extension Xj Substrate Down-scaling of MOS devices causes leakage current (short channel effects) Ultra shallow source/drain extension regions require: • High activation level • Shallow penetration of dopants IAEA CRP Chiang Mai2007

8. SOI 8 12 4 Challenge for further down-scaling 1800 Lg=20nm Lg=28nm 1500 Lg=10nm Lg=14nm 1200 RS (ohms/sq) 900 600 300 0 0 Junction depth @ 1E18cm-3 (nm) A 50nm MOSFET in production from a 90nm process (courtesy of Intel) 2005 ITRS requirements for p-type layers and future trends • High activation level 800 ohms/sq • Shallow penetration of dopants 15nm IAEA CRP Chiang Mai2007

9. Challenge for further down-scaling A 50nm MOSFET in production from a 90nm process (courtesy of Intel) 2006 ITRS requirements for p-type layers and future trends • High activation level 1200 ohms /sq • Shallow penetration of dopants 8-10nm IAEA CRP Chiang Mai2007

10. Why pre-amorphisation? Avoids Boron channelling Improves Boron activation Solid Phase Epitaxy! PAI & SPE IAEA CRP Chiang Mai2007

11. Implant damage: F. Cristiano et al, Mat. Sci. Eng. B, 114-115, p174 (2004) • Implant B in c-Si • Frenkel Pairs • Plus One Model Transient Enhanced Diffusion (TED) (schematic representation) Boron de-activation A. Michel et al, Appl. Phys. Lett, 50, 7, p417 (1987) IAEA CRP Chiang Mai2007

12. Amorphisation threshold Net excess interstitials after local recombination of I with V No point defects survive 10 22 ImplantB I 10 20 Amorphisation (concentration) V (destruction of crystal structure) I 10 18 Ge PAI depth 10 16 Pre-amorphisation & SPER • Ge amorphises Si • B implanted • I & V recombine • Net excess I depth (schematic representation) IAEA CRP Chiang Mai2007

13. SPEre-growth 10 22 B initially shallow and above solubility 10 20 (concentration) 10 18 10 16 Pre-amorphisation & SPER • Ge amorphises Si • B implanted • I & V recombine • Net excess I • SPE re-growth • EOR defect band depth (schematic representation) IAEA CRP Chiang Mai2007

14. BOX 10 22 I flux 10 20 (concentration) 10 18 TED 10 16 De-activation & diffusion • I flux toward surface • BIC formation • TED • What happens in SOI material? BICs depth (schematic representation) IAEA CRP Chiang Mai2007

15. PAI at a dose of 1x1015cm-2 Ge, with energies of 8keV & 20keV, bulk Si & SOI Experimental Design IAEA CRP Chiang Mai2007

16. Surface 8 keV Ge B BOX 55 nm 19 nm 20 keV Ge B BOX 55 nm 38 nm IAEA CRP Chiang Mai2007

17. PAI at a dose of 1x1015cm-2 Ge, with energies of 8keV & 20keV, bulk Si & SOI Experimental Design • Implanted with 500eV Boron at dose of 2x1013cm-2, 2x1014cm-2 and 2x1015cm-2 • Re-growth study (570ºC for 30 – 150s), check for wafer re-crystallisation • Activation & diffusion study, isochronal anneals (700ºC – 1000ºC for 60s) IAEA CRP Chiang Mai2007

18. Experiment One Do SOI and bulk Si samples experience a difference in temperature when annealed together? IAEA CRP Chiang Mai2007

19. RBS – Re-growth Rates Table of re-growth rate for increasing Boron dose B dose incr. • Re-growth rate increases with Boron dose • No effect of PAI energy on the re-growth rate • No real difference between Bulk Si and SOI IAEA CRP Chiang Mai2007 J.J. Hamilton, et al. Nucl. Instr. and Meth. in Res. B 237, 107 (2005).

20. Experiment Two What are the electrical and structural differences between SOI and bulk Si? IAEA CRP Chiang Mai2007

21. Hall Measurements Bulk Si & SOI implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 8keV Ge – EOR at 20nm Small difference between 8keV SOI Vs bulk J.J. Hamilton, et al. Appl. Phys. Lett. 89, 42111 (2006). IAEA CRP Chiang Mai2007

22. ~550ohm/sq. ~850ohm/sq. 35% reduction in ∆RsSOI than ∆RsSI PAI & SPER Bulk Si Vs SOI Bulk Si & SOI implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 20keV Ge – EOR at 40nm Less deactivation for 20keV SOI Vs bulk IAEA CRP Chiang Mai2007 J.J. Hamilton, et al. Appl. Phys. Lett. 89, 42111 (2006).

23. SIMS Measurements Bulk Si & SOI implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 8 & 20keV Ge + annealed at 800ºC for 60s 8keV 20keV • Higher level of out diffusion for 20keV SOI Vs bulk Si • Less B trapping in 20keV SOI Vs bulk Si IAEA CRP Chiang Mai2007

24. 40nm 40nm 55nm 20keV C D Bulk Si SOI surface 20nm 20nm 55nm EOR defects EOR defects 8keV BOX A B EOR defects EOR defects BOX 800ºC for 60s anneal for 8 & 20keV Ge in SOI & Bulk Si IAEA CRP Chiang Mai2007

25. SIMS Measurements Bulk Si & SOI implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 20keV Ge + annealed for 60s at 800ºC & 850ºC 800ºC 850ºC Significant less B trapping in SOI Vs Bulk Si J.J. Hamilton, et al. Appl. Phys. Lett. 89, 42111 (2006). IAEA CRP Chiang Mai2007

26. Physical Mechanism 20keV Ge Bulk 20keV Ge Bulk Interstitial Flux De-activation & TED Interstitial Flux Back interface sink for I  Faster EOR dissolution 20keV Ge SOI 20keV Ge SOI BOX BOX (schematic representation) IAEA CRP Chiang Mai2007

27. Experiment Three Optimisation of amorphisation conditions in SOI IAEA CRP Chiang Mai2007

28. PAI at a dose of 1x1015cm-2 Ge, with energies of 8, 20, 24, 32 & 36keV, both Si & SOI Experimental Design • Implanted with 500eV Boron at dose of 2x1015cm-2 • Isochronal annealing study (700ºC – 1000ºC for 60s) IAEA CRP Chiang Mai2007

29. Surface B B B BOX 8keV Ge 20nm 55nm BOX 20keV Ge 40nm 55nm BOX 24keV Ge 45nm 55nm B PAI dose of 1x1015cm-2 Ge, both Si & SOI + 500eV Boron at dose of 2x1015cm-2 32keV Ge BOX ~55nm 55nm IAEA CRP Chiang Mai2007

30. EOR defects XTEM Measurements SOI and Bulk Si implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 32keV Ge as-implanted + annealed at 700ºC for 60s SOI – as-implanted SOI – annealed Bulk Si – annealed ~4nm Re-growth has occurred, therefore has recrystallised Defect trapping within the BOX interface in SOI IAEA CRP Chiang Mai2007

31. BOX interface SIMS Measurements Bulk Si & SOI implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 32keV Ge, annealed at 850ºC for 60s EOR defect band overlaps BOX IAEA CRP Chiang Mai2007

32. 29% 51% 57% Van Der Pauw Resistivity SOI implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 8, 20, 24 & 32keV Ge – EOR at 20, 40, 45 & ~55nm Minimal deactivation for the 32keV PAI Less than 80ohm/sq. RS peak deactivation for 32keV (from 700ºC to 850ºC) IAEA CRP Chiang Mai2007

33. SIMS Measurements SOI implanted with Boron at a dose 2x1015 cm-2 and pre-amorphised with 8, 20 & 32keV Ge, annealed at 800ºC for 60s 32keV PAI shows highest level of activation, least TED and largest junction abruptness IAEA CRP Chiang Mai2007

34. Physical Mechanism De-activation & TED Back interface sink for I  Faster EOR dissolution 20keV Ge Bulk Interstitial Flux 20keV Ge SOI BOX 32keV Ge SOI BOX (schematic representation) IAEA CRP Chiang Mai2007

35. Modelling Surface Centroid BOX Interface j2 j1 L2 L1 x d - x d = fraction of interstitials Flowing towards the surface IAEA CRP Chiang Mai2007

36. Modelling IAEA CRP Chiang Mai2007 J.J. Hamilton, et al. Appl. Phys. Lett. 91, 92122 (2007).

37. Challenge for further down-scaling A 50nm MOSFET in production from a 90nm process (courtesy of Intel) 2006 ITRS requirements for p-type layers and future trends • High activation level 1200 ohms /sq • Shallow penetration of dopants 8-10nm • High activation level 1200 ohms /sq (800 ohms/sq) • Shallow penetration of dopants 8-10nm (20 nm) IAEA CRP Chiang Mai2007

38. Very promising for future USJ applications in SOI Conclusions SOI and Bulk Si experience same anneal temp. Very little c-Si is required to seed re-growth Two Mechanisms: • BOX acts as a sink for interstitials, with near zero value for recombination length • EOR overlaps BOX, reducing initial I number to interact with B Negligible B de-activation Shallow, abrupt junction IAEA CRP Chiang Mai2007

39. E.J.H. Collart Applied Materials M. Bersani, D. Giubertoni and S. Gennaro ITC-irst A. Parisini CNR-IMM B. Colombeau Chartered Semiconductors Justin Hamilton J. A. Sharp, A. J. Smith, N. Bennett and M. Kah University of Surrey Nick Cowern University of Newcastle Acknowledgements: IAEA CRP Chiang Mai2007

40. Any Questions? IAEA CRP Chiang Mai2007