Download
1 / 9
90 likes | 172 Vues
Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [Comments on FEC & Interleaver for LECIM FSK PHY] Date Submitted: [March 2012] Source: Sangsung Choi and Mi-Kyung Oh (ETRI)
E N D
Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [Comments on FEC & Interleaver for LECIM FSK PHY] Date Submitted: [March 2012] Source: Sangsung Choi and Mi-Kyung Oh (ETRI) Voice: +82 42 860 5680, FAX: +82 42 860 5218, E-Mail: sschoi@etri.re.kr Re: [802.15.TG4k] Abstract: This contribution is prepared to discuss about FEC & Interleaver for LECIM FSK PHY. Purpose: Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Sangsung Choi, Mi-Kyung Oh (ETRI)
Outline • The goal of this document is to discuss about FEC & Interleaver for FSK PHY in preliminary draft 089/r2. Sangsung Choi, Mi-Kyung Oh (ETRI)
FEC & Interleaving for FSK PHY • FEC in draft 089/r2 • The FSK PHY shall perform FEC as defined in 16.3.2.6 • FEC in 15.4g O-QPSK PHY • Interleaving in draft 089/r2 • The FSK PHY shall perform interleaving as defined in 16.1.2.5 • Interleaving in 15.4g FSK PHY • Comment • As doc. 134/r0 pointed out, clarifications for FEC & interleaving in FSK PHY are required Sangsung Choi, Mi-Kyung Oh (ETRI)
15.4g FSK PHY Review • FEC: rate ½ convolutional code with K=4 • Tail bits • Interleaving: Interleaving size: 32 coded bits • Padding bits Sangsung Choi, Mi-Kyung Oh (ETRI)
Modification: Approach #1 • FEC & Interleaving: Adopt as stated in current doc.089/r2 • Modification on tail bits & padding bits • Common structure over short PHR, long PHR and PSDU for low complexity • Tail bits: 6 zeros after PHR & PSDU • Padding bits • LPAD = 10 when (LPHR + LPSDU)/8 is even • LPAD = 2 when (LPHR + LPDSU)/8 is odd PHR PSDU Tail bits (T0, T1, …, T5) 10 Padding bits (P0, P1, …, P9) PHR PSDU Tail bits (T0, T1, …, T5) 2 Padding bits (P0, P1) Sangsung Choi, Mi-Kyung Oh (ETRI)
Modification: Approach #2 • As stated in the merged FSK proposal (doc.774/r1), the LECIM FSK PHY was intended to have a path to interoperation with other rapidly deploying standards, particular 15.4g • Therefore, the same FEC & Interleaving as in 15.4g FSK PHY will be motivated • Tail bits & padding bits are also same as 15.4g FSK PHY Sangsung Choi, Mi-Kyung Oh (ETRI)
Conclusion • FEC & Interleaving in the current draft • Clarifications are required • Comments • Common architecture for short PHR, long PHR and PSDU are desirable for low complexity • Possible Modifications • Approach #1: redefine tail bits and padding bits • Approach #2: use same FEC & interleaving as in 15.4g FSK PHY Sangsung Choi, Mi-Kyung Oh (ETRI)
Backup Slide Sangsung Choi, Mi-Kyung Oh (ETRI)
Block Encoding for PHR + PSDU • Already adopted in 15.4g FSK • At the receiver • PHR recovery may not be possible in one interleaving block due to traceback depth in Viterbi decoder implementation • Although two interleaving blocks are required for PHR recovery, there is no problem to recover PSDU • Main information in PHR: PSDU length • Since the min. length of PSDU is 7-octet with 4-octet CRC, the start of PSDU decoding without PHR information will not cause any difficulty in terms of complexity and power consumption Sangsung Choi, Mi-Kyung Oh (ETRI)
