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TSV Testing challenges [ 한국테스트학술대회 Tutorial]

TSV Testing challenges [ 한국테스트학술대회 Tutorial]. 2013. 06. 17 정우식 woosik.jeong@sk.com. Package 발전 방향. 소형화. 고성능 , 고화질. 저전력. 고용량. Source from Web. Bonding PAD & WIRE ( 기존 ). bonding pad 를 통해 wire 로 chip 외부와 연결. bonding pad 로 wafer level test 가능. Source from Web. 고속 고성능 메모리.

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TSV Testing challenges [ 한국테스트학술대회 Tutorial]

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  1. TSV Testing challenges[한국테스트학술대회 Tutorial] 2013. 06. 17 정우식 woosik.jeong@sk.com

  2. Package 발전 방향 소형화 고성능, 고화질 저전력 고용량 Source from Web.

  3. Bonding PAD & WIRE (기존) bonding pad 를 통해 wire로 chip외부와 연결 bonding pad로 wafer level test 가능 Source from Web.

  4. 고속 고성능 메모리

  5. TSV (Through Silicon Via) 4th TSV 는bonding pad 보다 1) 작을 수 있고 2) 밀집될 수 있다. 3rd 2nd 1st Chip TSV

  6. Package 형태 비교 Wire Bond TSV stack (동일 chip) TSV stack (Slave + Master) TSV stack (SIP 구조) RDL, Wire loading 적층의 한계 고속동작 어려움 수십개의I/O 용량 증대 소모전류감소 Data BW 증대 (Multi-IOs) (수천개의IO) Core Die GPU Logic Die IO Interposer Substrate 난이도 ↑, Cost ↑, Bandwidth ↑ (IO수, 소모전류 ↑)

  7. Test Flow Wire Bond TSV (KGSD) • Wafer level test는 어떻게? • (Bonding Pad or uBump direct probing) • Probe Card 제작 • Test time WFBI WFBI Wafer test Wafer test(Slave) Wafer test(Master) • 해야 하는가? • 열화 방지, test time Cell Repair Repair Cell repair Ass’y Stack Ass’y TSV Repair • 효율적인 KGSD Repair 방법 Burn-in ?? Burn-in KT3H/C PKG test Stack 후 Repair • 수천개의uBump를어떻게 보장할까? Repair 검증 Speed test High Speed SiP

  8. Probe Card & Test system

  9. Wafer level Burn-in Infant mortality End of life wear-out Fail rate Normal Life time

  10. RA & Repair (KGSD) Wafer (H) Wafer (C) KGSD Repair data Repair data?? Logic die Core die Core die Core die Core die

  11. uBump direct testing Logic die Logic die … … Core die Core die Core die Core die

  12. Summary • TSV 는bonding pad 보다 작고 많다. • Test 필요한 pin수가 많아진다. • 동작 pin수가 많아져서 소모전류가 커진다. • Stack후 RA & Repair가 필요할수도 있다. • 메모리 + SoC + test system + Probe Card 협력필수 • 테스트 infra가 크게 바뀔 것 이다.

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