The NEMO DAQ electronics: Actual characteristics and new features

1. The NEMO DAQ electronics: Actual characteristics and new features

2. NEMO tower layout Electrical link FCM (Floor Control Module) OM-PMT & FE electronics Floor 16 10Mbps 40m Floor 15 40m Optical link 10m Floor 2 40m PMT4 PMT3 Floor 1 PMT1 PMT2 Optical link Tower Base 150m Secondary Junction-Box • The basic self • consistent element • is the tower • Main components: • Optical module • (PMT and FE) • Floor Control Module • Junction Box

3. Data transmission Shore Storage and data manager FEM#0 FEM#1 Sea • Optical module data coming • from 4 Front End modules (FEM) • Off shore data concentration • is carried out by Floor Control • Module Board (FCMB) FEM#2 FEM#3 • One floor data is received • on shore by twin FCM board • plugged on host machine

4. Front End Module Board • Signal sampling: • double 100 MHz 8 bit ADC’s • quasi-logarithmic compression • (13 bits) • On board calibration circuit • PMT HV management • Low power • Safe configuration from remote • Optical Module housekeeping

5. Floor Control Module Board • Off shore - On shore link • FEM interface • Fiber Optic interface DWDM transceiver • Communication with other electronics: • Slow control board • Time Calibration • Other features: • Safe remote reconfiguration

6. Electro-Optical Interface: Ser-Des (up to 1.4 Gbps) + DWDM compliant Transceiver Floor Control Module Board data bridge Electrical Interfaces for 4 Optical Modules (up to 8) • 3 Differential Lines: • Tx Clock line (5 MHz) • Tx Data line (5 Mbps) • Rx Data line (20 Mbps) Spartan-3 FPGA bridges optics and OMs

7. Floor Control Module Board interfaces Slow Control board connector: electrical link with SPI interface Power Area: linear LDO regulators to minimize noise. On-shore Clock Input • Time calibration connector: • set calibration parameters • trigger optical pulses to OMs • Freescale DSP56301 with PCI 32/33 interface: • Board Debug • System control and management • On-shore data and slow control extraction • Measured sustained performance: 60MBps

8. PLL Clock distribution: On shore Data + clk to off shore Sys clock Data Sys clock Slow clock Time station (GPS)

9. Clock distribution: Off shore Sys clock Data + clk from on shore Data Clock and data on the same fiber

10. The FCMB for NEMO phase 2 Analog signals FCM (Floor Control Module) OM-PMT • FE embedded on FCMB Floor 16 40m Floor 15 • New AD converters: • one 12 bit 200 MHZ • ADC per PMT 40m electricallink 10m Floor 2 • New on shore interface • (1 Gbit Ethernet • or PCI Express) 40m PMT4 PMT3 Floor 1 PMT1 PMT2 Optical link Tower Base 150m Secondary Junction-Box

11. Mem Debug FE Section From Time station RS232 SRam Flash JTAG Clk @ 200 MHz RJ 45 12 pairs LVDS ADC #1 Amp & Co. Clk from shore 12 pairs LVDS System Clk PLL ADC #2 Local oscillator Amp & Co. FPGA Xilinx V5 12 pairs LVDS ADC #3 OpticalCommunication Mezzanine Amp & Co. 12 pairs LVDS ADC #4 Amp & Co. On shore Com power RS2323 #1 RJ 45 1GB DC/DC Power to PMT and OM RS2323 #2 hydrophones Off shore instrumentation from floor module PCIe The new FCMB

12. VS NEMO phase 1 NEMO phase 2 • FE into OM • FE embedded on FCMB • Two 8 bit 100 MHZ • ADC’s per PMT • One 12 bit 200 MHZ • ADC per PMT • Gbit Ethernet • or PCI Express • on shore interface • PCI on shore interface • AC/DC power DC/DC power

13. The next phase: Copper data link Analog signals FCM (Floor Control Module) OM-PMT & FE electronics Floor 16 40m Floor 15 40m electrical link 10m Floor 2 40m PMT4 PMT3 Floor 1 PMT1 PMT2 Optical link Tower Base 150m Secondary Junction-Box

14. Mem Debug FE Section From Time station RS232 SRam Flash JTAG Clk @ 200 MHz RJ 45 12 pairs LVDS ADC #1 Amp & Co. Clk from shore 12 pairs LVDS System Clk PLL ADC #2 Local oscillator Amp & Co. FPGA Xilinx V5 12 pairs LVDS ADC #3 New Communication Mezzanine Amp & Co. 12 pairs LVDS ADC #4 Amp & Co. On shore Com power RS2323 #1 RJ 45 1GB DC/DC Power to PMT and OM RS2323 #2 hydrophones from floor module Off shore instrumentation PCIe The next phase: Copper data link