Alain C. Diebold

1. Metrology and Characterization Requirements and Challenges for the Nano-World of Integrated Circuits And Its Overlap with Nano Technology and Science Alain C. Diebold

2. AGENDA • The ITRS Challenge • Litho Metrology • FEP & Interconnect Metrology • Materials Characterization

3. ITRS:International Technology Roadmap for Semiconductors • The ITRS includes the roadmap for emerging NanoTechnology and Electronics. • The ITRS is sponsored by the Semiconductor Industry Association (SIA), the European Electronic Component Association (EECA), the Japan Electronics & Information Technology Industries Association (JEITA), the Korean Semiconductor Industry Association (KSIA), and Taiwan Semiconductor Industry Association (TSIA) • International SEMATECH is the global communication center for this activity. The ITRS team also coordinates the USA region events.

4. 32 nm Node Metrology R&D Materials available 10 nm structures difficult to obtain ITRS Challenge for Metrology In-Time Metrology and Characterization Leading Edge Tool Specifications set

5. ITRS ChallengeNew Materials and Structures

6. UL LL CP < 1 6 CP = 1 CP > 1 Process control Is based on Statistical Significance CP = CPK If Distribution is Centered

7. What are you Measuring? single value from distribution of > 500 Million average test structure inside a die Distribution of linewidths inside test structure

8. L S One Aspect of the Solution: Average over large area & Amplify Signal from Microscopic Changes e.g. 150 nm lines 300 nm pitch Optical CD using Overlay System Rapid Sampling of test structures

9. SENSOR based Integrated MetrologyAdvanced Process Control - Advanced Equipment Control Components of Solution • APC, including Run-to-run control • FDC: Fault Detection and Classification • Integrated Metrology

10. Metrology & New Structures Memory Logic

11. Messages from IC Industry • In-Line Metrology must be linked to the Manufacturing Process • Advanced Process Control and Advanced Equipment Control will be Necessary for NanoManufacturing Process Productivity • Metrology for NanoElectronics will also be more than Dimensional and Mechanical Measurements – Electrical Properties of materials and Electrical Parametrics of devices must be considered

12. AGENDA • How to control microscopic features • Litho Metrology • Example of Interaction between Manufacturing Process and Metrology • FEP & Interconnect Metrology • Materials Characterization

13. 22 nm Node - 2016 6.35mm 152mm 152mm 52 nm mask line width 26 nm scattering bars 13 nm printed line width EUV 9 nm physical line width Litho Metrology for Volume Manufacturing CD Control Starts at the Mask Overlay and CD Control after Exposure CD Control after Etch

14. Investigate High Voltage CD-SEM High Voltage CD-SEM 100 – 200 keV e- Comparison of conventional SE (left) and Low Loss (right) images of copper interconnects. Note the greatly enhanced surface detail and lack of edge brightness in the Low Loss image. Micrograph courtesy of O C Wells Low loss detector Figures from David Joy

15. Mirror Q in =  out Multi-wavelength Light Source Polarization Sensitive Detector Incident Polarized White Light 0th order Scatterometry for CD Measurements What are the Limits Real Time Calculation of line width & shape Eliminates Libraries

16. Average vs Individual • CD-SEM measures one line at a time • Scatterometry gives an average over many lines • Reports indicate a large number (80 different lines) CD-SEM measurements in test area required to match scatterometry average • Lose individual line information

17. Vdd In Out CL CD Metrology: Status of scatterometry • Scatterometry works well for gate control • Ring Oscillators still (always will be?) key way to access CD control. • Closed Loop APC + scatterometry have resulted in a tightening of range of Idsat for microprocessors. Tight Idsat gives tight distribution of Transistor Delay t t ~ C Vdd/(Ion*W) Ion units: µA/µm C = Cs/d + CL Thanks to Peter Zeitzoff and Larry Larson

18. Opportunities for the distant future Electron Holography & Low Energy Electron Microscopy (LEEM) Point Projection Microscope LEEM Si(111) New normal incidence David Joy, Univ. of TN Tromp and Reuter IBM

19. AGENDA • How to control microscopic features • Litho Metrology • FEP & Interconnect Metrology • Materials Characterization

20. Front End Process & Interconnect Metrology New Materials & Structures Metal Gate Strained Si & SOI or locally strained channels High  & interfaces CMOS and non-Classical CMOS

21. Interconnect Metrology • VOID Detection in Copper lines • Killer Pore Detection in Low k • Barrier / Seed Cu on sidewalls • Control of each new Low k

22. Extra reflection from SOI Wafers Impacts Optical Measurements and Light Scattering Quantum confinement for sub 20 nm silicon Need SOI Optical Constants

23. Quantum confinement effect on optical properties of very thin SOI SOI “bulk”

24. Beyond Classical CMOS Metrology on Sidewalls New Optical paths??? Double-Gate MOSFET

25. X-ray Reflectivity Monochromator X-Ray Sensor Spatially Resolving Thin-Film Sample X-Ray Tube 16ű2Å rms Angle 0.0 0.5 1.0 1.5 1 5ű1Å rms 969ű1Å Cu 0.1 250Å ±1Å Ta Reflectivity 0.01 Silicon 0.001 Fit from SB-Code 0.0001

26. AGENDA • How to control microscopic features • Litho Metrology • FEP & Interconnect Metrology • Materials Characterization

27. Materials Characterization NEEDS • Atomic Resolution including Interface Analysis • Rapid Sample Preparation and Analysis • Move new Materials Characterization into Manufacturing as soon as possible • Location of NanoFeatures to allow Characterization – e.g. Dual Column FIB • Optical Metrology is part of total picture of Off-line Characterization • Trace Analysis Improvements

28. The future : Aberration Correction Lens for TEM/STEM • The next step in improving spatial resolution for HR-TEM and ADF-STEM • Phil Batson’s demonstration of sub – Angstrom resolution for STEM • Commercial TEM’s with aberration correction lens now available. • Next generation TEM - TEAM project is critical to Nanotechnology TEAM = transmission electron aberration corrected microscope

29. Aberration Correction LENS for TEMAlso Improves Spatial Resolution for ELS

30. Professor John Sinclair Cornell

31. SEM with Aberration Correction LENs • Commercial SEM with aberration corrections now available • What are pros and cons of use in SEM?

32. Vaccel Local Electrode Atom Probe z Vpulseb y x Vex Atom Distribution : < 100% detection Tom Kelly - Imago

33. LEAP – Next Steps • Develop Infrastructure in Universities and National Labs • Develop Applications • Improve Detection to ~100% • What to do about insulators??

34. Conclusions • Semiconductor Industry is already Roadmapping the 15 year horizon for NanoElectronics. • NanoElectronic Research already requires characterization with atomic resolution • Economically feasible NanoElectronic Manufacturing requires rapid, statistically significant Metrology • US centric TEM [TEAM] project is critical to NanoTechnology

35. Extra Overheads

36. Current flow Width Length or CD p-Si core/i-Ge/SiOx/p-Ge GL = 1500 nm EOT ~ 0.4nm Observed range of 1 to 5  A @ 1V Diameter without metal connection to Ge gate is 50 nm 1 milli-amp of current/ m needed to meet performance requirements 1 x 10-3 amps = 200 nanowire transistors x 5000 nano Amps/transistor This would require 200 nanowires in 1 micron width = 50 nm / nanowire with Idsat = ~ 5A/m of each nanowire transistor @ 1Vdd Or 1000 nano Amps/transistor x 1000 nanowire transistors with 10 nm space With Idsat = ~ 1A/m -------- an impossible pitch

37. Top Down Image SEM for CD Measurements

38. Ultra-Low Voltage CD-SEM- Line Edge Determination (Still) requires a model Figure courtesy Neil Sullivan

39. Metal Illumination Borden, Smith, Diebold, Chism, IEEE Transactions on Semiconductor Manufacturing 16, August 2003

40. Metal Illumination:Detection of open vias Borden, Smith, Diebold, Chism, IEEE Transactions on Semiconductor Manufacturing 16, August 2003

41. R-C test structures of new low  Prior to manufacture Resistance Test Capacitance Test

42. Pores are Difficult to see!!! Bryan Tracy AMD Low k Cross-section Image from most advanced Lab SEM

43. Porous Low-k 391.1 nm 18 nm 6 periods SiNC 15 nm (density 1.89g/cm3) SiNC 15 nm (density 1.89g/cm3) SiNC 15 nm (density 1.89g/cm3) SiNC 3 nm (density 1.70g/cm3) SiNC 3 nm (density 1.70g/cm3) SiNC 3 nm (density 1.70g/cm3) SiO2 (density 2.14 g/cm3) 550 nm Si substrate XRR for low  process control

44. Optical Models for Each New Low 

45. 0.050 Average pore diameter = 50 Å 105 0.040 p = 0.2 Scattering Intensity 0.030 p = 1 p = 0.5 0.020 0.010 100 0.000 Scattering Angle 6 0 10 20 30 40 50 60 70 2 4 8 r (Å) Pore Size Distribution Diffuse (small angle) x-ray scattering (r) p

46. 0.050 Average pore diameter = 50 Å 0.040 p = 0.2 0.030 p = 1 p = 0.5 0.020 0.010 0.000 0 10 20 30 40 50 60 70 r (Å) Pores Size Distribution via : a Diffuse X-ray Scattering b Ellipsometric Porosimetry dV/dR (r) p a b

47. Probe Beam Excitation Laser Pulse Film Detector Substrate 1 - Probe beam strikes surface grating Diffracted Reflected Diffracted Detector Impulsively Stimulated Thermal Scattering Cu 270 MHz Acoustic Wavelength 2 - Form grating and excite acoustic wave 3 - Probe beam diffracted as wave travels parallel to surface

49. SHG Experimental Setup P M T U G - F i l t e r P r i s m R G - F i l t e r I r i s w 2 w @ 3 e V P o l a r i z e r s L e n s e s T i : S a p p h i r e L a s e r l = 7 0 0 - 9 2 0 n m , t = 1 0 0 f s , p P = 4 0 0 m W a v S a m p l e R o t a t i o n T a b l e 2 2 w w ( 2 ) ( 2 ) ( 3 ) ( ) µ c + c I ( t ) E ( t ) I Norm Tolk - Vanderbilt University Mike Downer – University of Texas

50. Si SiO2 Si SiO2 e- e- Laser Stimulated Electron Injection Example of leakage current measurements : Effect of X-Ray Induced Traps Before Irradiation After Irradiation • Traps have two functions: • to trap electrons • to provide hopping centers for electron tunneling Norm Tolk - Vanderbilt University