Computer OrganizationLecture 22 Project 6 Hard disk drive Bus arbitration University of Portland School of Engineering
Project 6 • Due: Friday, December 1 • Microprogram the instruction set • Complete MDP16 design • Execute a simple program • Extra credit for additional instructions University of Portland School of Engineering
MDP16 execution Program stores 0x25, 0x35, and 0x45 at 0x100, 0x101, 0x102 and reads the numbers back University of Portland School of Engineering
MicroROM contents University of Portland School of Engineering
Example trace $0 = 0x100 for address of sw University of Portland School of Engineering
Example trace, continued. Mem[100] = 0x25, Mem[101] = 0x35, Mem[102] = 0x45 University of Portland School of Engineering
Example trace, continued. Now load 0x100, 0x101, 0x102 into $1 University of Portland School of Engineering
Computer components • Input: receives information from external world • Output: transmits information to external world • Memory: holds programs and data • Data path: physical route that carries info • Control: coordinates overall flow of info University of Portland School of Engineering
System Bus The bus interconnects system agents University of Portland School of Engineering
··· Agent 0 Agent n Signal 0 Signal 1 Bus ··· Signal n System view of a computer One Agent at-a-time owns the bus University of Portland School of Engineering
Agents • Goal: perform some function (memory, I/O, etc.) • Types • Master: can own the bus, assert signals • Slave: only responds when requested by master • Operations • Memory or I/O space • Read or write • Interrupt University of Portland School of Engineering
What type of agent? University of Portland School of Engineering
Moving-head disk Disk buses include EIDA, SATA, SCSI Performance = seek time + latency time + transfer time NOTE: Unique location denoted CHS cylinder, head, sector University of Portland School of Engineering
Disk features • Platter: magnetically coated disk • Side: one of two platter surfaces • Arm: lever arm that swings across platter • Head: sensor that reads/writes data on platter • Track: circular region on platter • Cylinder: collection of tracks with same radius • Sector: region of a track, basic unit of data (B) University of Portland School of Engineering
Disk performance • Seek: time to move arm • Latency (rotational): time for platter to rotate to requested sector • Transfer: time to move data across bus University of Portland School of Engineering
High-end disk example Buffer = disk cache Host = PC disk controller University of Portland School of Engineering
Find disk bandwidth, transfer time? CLK = 100 ns, 32-bit data bus, 5 clocks/bus cycle, 512B sector University of Portland School of Engineering
Find the disk average latency? Twelve 5 cm platters, 7200 rpm, 120 GB University of Portland School of Engineering
··· Agent 0 Agent n Signal 0 Signal 1 Bus ··· Signal n System view of a computer One Agent at-a-time owns the bus University of Portland School of Engineering
Example bus control signals? University of Portland School of Engineering
Bus cycle (phases) • Arbitration: owner defined • Address: ID of memory or I/O provided • Data: information transferred • Response: indicates completion of cycle Bus phases similar to instruction steps University of Portland School of Engineering
Bus timing Address Bus Driven Data Bus Driven Clk Breq Bgnt Ack ARB ADR DATA RESP University of Portland School of Engineering
Disk Mem-data Disk-Adr Mem Bus Cycle Bus timing example A little more complex Shared signals driven by different agents Disk Mem University of Portland School of Engineering
Bus arbitration • Serial: priority in-out, Request-Grant, sent from agent-to-agent (daisy-chain) • Parallel: each agent asserts unique request (centralized), one grant asserted • Distributed • Self-selection: agent codes combined to identify owner • Collision detection: request repeated after a delay University of Portland School of Engineering
Serial arbiter Each priority circuit ripples to next in line University of Portland School of Engineering
Design the priority circuit? Gnt = Pout = University of Portland School of Engineering
Device 1 Device 2 Device n ••• Req 1 Req 2 Req n Gnt 1 Gnt 2 Gnt n Central Arbiter Fixed, round-robin, multi-level, etc. Centralized arbitration More & fast logic, flexible algorithm University of Portland School of Engineering
Fixed centralize arbiter University of Portland School of Engineering
Simple RR arbiter Req3 11 Req2 Req1 10 01 Req0 00 Gntn = StatenReqn University of Portland School of Engineering
University of Portland School of Engineering
What type of agent? High-performance agents are often Masters University of Portland School of Engineering
Find disk bandwidth, transfer time? CLK = 100 ns, 32-bit data bus, 5 clocks/bus cycle, 512B sector University of Portland School of Engineering
Find the disk average latency? Twelve 5 cm platters, 7200 rpm, 120 GB University of Portland School of Engineering
Example bus control signals • Bus request, bus grant • Read, write • Memory space, I/O space • Address valid, data valid • Wait • Interrupt request, interrupt acknowledge University of Portland School of Engineering
Gnt = Req · Pin Pout = Req · Pin Design the priority circuit? University of Portland School of Engineering
