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EMCal trigger options for the RXN detector

EMCal trigger options for the RXN detector. Paul, Wei, Chun, Steve, John; Shane Frank, Glenn Young June 22, 2006. Ground Rule Assumptions. We are trying to make a min-bias trigger for use in low-energy A+A, and possibly p+p.

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EMCal trigger options for the RXN detector

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  1. EMCal trigger options for the RXN detector Paul, Wei, Chun, Steve, John; Shane Frank, Glenn Young June 22, 2006

  2. Ground Rule Assumptions We are trying to make a min-bias trigger for use in low-energy A+A, and possibly p+p. We are only considering the EMCal 2x2 tile sum trigger, since (i) it’s much simpler, and (ii) its threshold is much, much lower than the 4x4 tile sum triggers. We’re restricted to one EMCal FEM. NB: We need to confirm with ERT expert that lowest useable 2x2 tile threshold will fire on one primary (not one MIP) from the vertex hitting one tile of the RXN.

  3. Each EMCal FEM sees a 12x12 array of modules/PMT’s. Analog signals from each 2x2 group of PMT’s are added together. Each 2x2 sum is compared to a programmable threshold, yielding 36 trigger bits per FEM on each clock tick. 36 “Mondo” chips on 6 ASIC cards Trigger card LVDS cable to ERT input (muID ROC) PMT’s 36 2x2 bits per clock tick

  4. Serial String Trigger Card Block Diagram Logic Part for 2x2 Sums Thresh N (6 bit) 2x2 Sum Bits 36 >? One Bit Out for 2x2 Sums Count 6 4 4x4A Sum Bits 36 To ERT LVDS Driver 4x4B Sum Bits 36 4x4C Sum Bits 36

  5. Group detector in pairs to make 24 radial slats, one into each 2x2 EMCal tile. Use existing trigger card; min-bias is effectively an OR over all 24 slats north and south. Option 0 Thresh N (6 bit) 36 >? Count 6 North 4 One Bit to ERT LVDS South

  6. Reprogram trigger card to divide the 2x2 sum bits into two groups, and then generate their AND. Assign one half to North and one to South to allow NS coincidence trigger. Option 1 Thresh N (3 bit) 18 >? Count 36 AND Thresh N (3 bit) North 4 >? Count 18 One Bit to ERT LVDS South

  7. Reprogram trigger card to divide the 2x2 sum bits into two groups and output each group’s comparison separately. Need to modify trigger card hardware to get two bits to ERT. Option 2 Thresh N (3 bit) 18 >? Count 36 Blue wire Thresh N (3 bit) North 4 >? Count 18 Two Bits to ERT Cut LVDS South

  8. Thresh N (1 bit) Thresh N (1 bit) Thresh N (1 bit) Thresh N (1 bit) Reprogram trigger card to divide the 2x2 sum bits into four groups and output each group’s comparison separately. Group detector elements into 6 pairs per inner/outer ring. Option 3 6 6 36 Blue wires North 4 Four Bits to ERT 6 LVDS 6 Cuts South

  9. Comparison of options:AdvantagesDrawbacks Option 0:Needs no modification of existing system Cannot distinguish North/South, Inner/Outer Option 1:Can form N-S coincidence; no hardware modification Need re-programming; relatively inflexible Option 2:N,S send to ERT separately, somewhat more flexible Need re-programming and hard-wire modification Option 3:Maximum flexibility, [N/S] x [Inner/Outer] to ERT Needs most re-programming and hard-wire work

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