wireless laptop alarm no 20 n.
Skip this Video
Loading SlideShow in 5 Seconds..
Wireless Laptop Alarm (No.20) PowerPoint Presentation
Download Presentation
Wireless Laptop Alarm (No.20)

Wireless Laptop Alarm (No.20)

169 Vues Download Presentation
Télécharger la présentation

Wireless Laptop Alarm (No.20)

- - - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript

  1. Wireless Laptop Alarm (No.20) Marla Cox Li Tseng

  2. Outline • Introduction • Goals of the project • Design Procedures • Testing Procedures • Conclusions • Recommendations

  3. Introduction • Our goal was to create a laptop alarm with a self-activated device that works as far away as possible • Concept: if a person leaves his or her laptop unmonitored, and then finds the laptop is missing, he or she can turn on the alarm using the transmitter. The alarm can only be turned on or off by the end user through the transmitting device.

  4. Goals of the Project • Low power consumption • System can operate from laptop battery power • Range of 150-300 feet • Packaged to fit on the back of a laptop or integrated into one

  5. Transmitter Self-Activated by the End User Demodulation Circuitry With Basic Stamp Superheterodyne Receiver Alarm Overall Design Description Antenna • Receiver that receives at 916.5 MHz and outputs at 10.7 MHz • 2 dipole antennas for the wireless communication link • Circuitry which modulates the signal at the transmitter (a LINX module) and demodulates it at the output of the receiver

  6. Designing the Antenna • Built a dipole antenna link because it had a circular pattern in the XY plane • Modeled and simulated antenna design on HFSS Antenna Model Pattern in y-z plane Pattern in x-y plane

  7. Construction of Antenna • Used RG-402 coax cable • Added SMA connector to cable • Soldered dipole arms to inner and outer conductor • Attached sleeve balun to outside of coax

  8. Testing of Antenna • Tested S11 on Network Analyzer • Tested dipole pattern in the range • After two antennas were built, tested S21 using the Spectrum Analyzer

  9. Graph of S11 of Antenna Log Mag Plot of S11 Smith Chart Plot of S11

  10. Antenna Pattern Obtained in Range Measurement Dipole Pattern in X-Y Plane Dipole Pattern in X-Z Plane

  11. S21 Measurement with Both Antennas Transmitted Power = -26 dBm, r = 1 cm Transmitted Power = -4 dBm, r = 1 cm

  12. RF Filter 916.5 MHz IF Filter 10.7 MHz Superheterodyne Receiver Design Block Diagram Antenna Mixer Demodulation Circuitry RF Amplifier IF Amplifier LO 905.8 MHz • Frequency conversion makes it easy to realize narrowband filter and high gain amplifier • With mixer, it is very capable of rejecting noise and other undesired signals • Each block has to be matched to 50 ohms

  13. Radio Frequency Stage (RF) 8.2nH Filter Impedance 50 ohms 3pF • Preselector (RF) filter passes the desired signal and rejects signals at the image frequency, |f(LO)-f(IF)| • 3 dB bandwidth is about 700 kHz • Tested by measuring S21 response; by sending a signal from the signal generator and monitoring the output on the spectrum analyzer

  14. Monolithic Amplifier: MAR-8A • The gain at 916.5 MHz is about 20 dBm • The gain at 10.7 MHz is about 28 dBm • Tested using the network analyzer

  15. Local Oscillator (LO) • LO outputs at 905.8 MHz to the mixer • Provides about 8.4 dBm power to turn on or off the diodes in the mixer to enable frequency conversion • Tested using the network analyzer or oscilloscope

  16. Intermediate Frequency Stage (IF) • Tested with the IF filter and one amplifier, it provides about 14.5 dBm gain. • 3dBm bandwidth is about 300 kHz • Tested by measuring S21 response; by sending a signal from the signal generator and monitoring the output on the spectrum analyzer

  17. Receiver Validation • Tested by sending a signal at 916.5 MHz and displaying output on the spectrum analyzer • Difficulty to exactly match components to 50 ohms at high frequencies results losses in signal power where we expected gain because the parasitic components tend to dominate the circuit performance

  18. Designing the Envelope Detector • Original design was just a couple diodes with a capacitor and resistor with reasonable time constant • After building circuit and seeing that the output voltage from the receiver would vary with distance from antenna, had to get rid of DC offset from diodes and amplify signal to work in a range of power levels

  19. Construction of Envelope Detector Circuitry • Envelope detector • Capacitor to strip DC offset from signal • Amplifier to amplify signal • Comparator to set high voltage to 1, low to 0

  20. Testing of Envelope Detector • Using the function generator we tested the envelope detector by modulating a 10.7 MHz signal with the output of the transmitting Basic Stamp and sending it into the input of the envelope detector • After the receiver was built we tested it by sending the signal through the receiver

  21. Limitations of Envelope Detector • Can only work with signals with power amplitude greater than –18 dBm (adding more amplifiers does not work) and less than 15 dBm (amplifier saturates)

  22. Purpose of the Basic Stamps • We used two Basic Stamp microcontrollers in our design, one at the transmitting end and one at the receiving end • The Stamp at the transmitting end was programmed to send the start and stop codes when the user decides to stop and start the alarm • The Stamp at the receiving end at the output of the envelope detector was programmed to turn on the alarm when it received the start code and turn it off when it received the stop code

  23. Transmitter Code ' {$STAMP BS2} ' {$PBASIC 2.5} btnWrk VAR Byte INPUT 1 OUTPUT 15 GOTO Start Stop1: SEROUT 15, 16780, ["SR"] 'PAUSE 5 BUTTON 1,1,255,250,btnWrk,0,Stop1 GOTO Start1 Start: 'IF IN1 = 0 THEN Start BUTTON 1,1,255,250,btnWrk,0,Start Start1: SEROUT 15, 16780, ["SZ"] 'PAUSE 5 'IF IN1=0 THEN Start1 BUTTON 1,1,255,250,btnWrk,0,Start1 GOTO Stop1 Receiver Code ' {$STAMP BS2} ' {$PBASIC 2.5} INPUT 1 OUTPUT 15 LOW 15 Top: SERIN 1, 16780, [WAIT("SZ")] HIGH 15 SERIN 1, 16780, [WAIT("SR")] LOW 15 GOTO Top Basic Stamp Code

  24. Adjustments for Basic Stamps • When testing the entire system, we noticed that with a longer code being sent from the transmitting Basic Stamp some of the bits were being misinterpreted • We shortened the code that was sent by the Basic Stamp and increased the frequency of the modulation from 300 Hz to 2400 Hz to solve this problem

  25. Packaging • The plan for our end product was to have the entire receiver and envelope detector on a PCB board that could be easily mounted on the back of a laptop • Due to timing issue and redesign, we were not able to conduct extensive tests with the PCB

  26. Putting it All Together • At the demo, we wanted to show our prototype working together • We managed to get the system working by directly applying the modulated signal to the input of the receiver • The device will work with a input signal power at the receiver of -20 dBm or more.

  27. Tolerance Analysis • Our tolerance analysis was to make the device work at as long a range as possible • By of Friis Transmission formula, we see that power received from antenna drops off by factor of 1/(r^2) • At 1 meter, power received is –30 dBm • At 10 meters, power received is –50 dBm • To increase range, we had to try to amplify the signal as much as possible • Amplified signal as much as possible at envelope detector • No loss in receiver

  28. Power Consumption Analysis

  29. Cost Summary

  30. Future Recommendations • Rigorous matching and component modeling to minimize signal loss • Surface mounted components • Higher power rating • Gallium-Arsenide FET replacing Silicon BJT for higher gain and lower noise in the LO design • Alternative material for the antenna • More sensitive demodulation

  31. Acknowledgement • Professor Carney • TA Shenghui Zhang • Professor Franke • Professor Bernhard • TA Chris Hagen