1 / 1

Advanced Techniques for WCET Analysis and Robustness in MpSoC Design and Optimization

This document presents state-of-the-art methodologies and tools for analyzing Worst-Case Execution Time (WCET) and Best-Case Execution Time (BCET) within multi-processor systems on chip (MpSoC). It covers various approaches, including configuration of performance models, sensitivity analysis through evolutionary algorithms, and the application of formal methods for ensuring whole-system reliability. Additionally, we explore scenarios highlighting dynamic migration, scheduling effects in real-time environments, and the integration of advanced runtime prediction frameworks.

bianca
Télécharger la présentation

Advanced Techniques for WCET Analysis and Robustness in MpSoC Design and Optimization

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. SAKE Konfidenz-Abschätzung (Informationsqualität) FLEUR Firmen-Contracts (Entwurfsmethoden&Toolflows) Management IDA Projekte (V2.0) Ableitung SymTA/S Tool SymTA/S (Artist 2) Robustheit / Sensitivität (evolutionären Algorithmen) Racu, Hamann CONAN Kontexte / Szenarien (Echo-Effekt, Scheduling) Henia formal WCET / BCET liefern (1) SymTA/P WCET-Analyse (OpenSource) (formale C-Code Analyse) Staschulat ACCORD (Artist Design) Performance von MpSoC (Shared memory) Schlieker WCET / BCET liefern Liefert CFG Speicherzugriffe (4) (2) COMBEST Ereignisströme (COM-Layer) Rox Wormhole Runtime Prediction (Token C-Code Analyse) Braam NEU Szenarienwechsel / statische Migration (Analyse der Wechselprotokolle auf MpSoC) Negrean, N.N. Software (4,5) (2) (2) Laufzeitbibliotheken AIS (Toyota) PFD (Fault Tolerance) Sebastian SuReal Tool-Chain (SymTA als Plugin) Rox (5) Case-Study: Motivation EPOC (SymTA/O) Verteilte Analyse (& Optimierung / Observing) Stein, Neukirchner SUMMERLAKE Mp für Breitbandkomm. (Stream Processing) Ivers ??? ??? (Statistik) Ivers Hardware (3) (5) Task-Migration 2 Board Demonstrator Algorithmus Flexfilm FPGA (Rekonfigurierbarkeit) Sahlbach, Whitty VW Gateway-FPGA (Appl: Echtzeit/HW-SpeedUp) Sahlbach, Whitty Morpheus (Rekonfigurierbarkeit) Sahlbach, Whitty COMPOSE Intel (Echtzeit in General-Purpose) Diemer (2,3) • Kompetenzbereiche • Sensitvität • Shared Ressource • Optimierung • Quellcode-Analyse • Statistik MEDIA SPI COSYMA SFB 420 Rapid_Prototyping

More Related