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EGEE 4110 Digital Signal Processing Lecture 4

Delve into digital signal processing with an emphasis on system structures and fundamental building blocks for effective implementation. Explore filter interconnections, structures for FIR and IIR filters, and insights into hardware and software implementations.

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EGEE 4110 Digital Signal Processing Lecture 4

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  1. EGEE 4110Digital Signal ProcessingLecture 4 Digital System Structures Professor Timothy Tuinstra

  2. x1[n] + x1[n]+x2[n] x2[n] Basic DSP Building Blocks x[n] αx[n] α

  3. x[n] x[n-1] z-1 Basic DSP Building Blocks Note: Delay blocks in DSP designs essentially imply a memory register large enough to hold one sample at whatever precision the architecture requires…i.e. a delay is a memory element!

  4. g[n] h[n] h[n] g[n] Filter Interconnections • The associative property of convolution allows us flexibility when we create digital systems. =

  5. The distributive property of convolution also allows us flexibility when we create digital systems. Filter Interconnections h[n] x[n] = h[n]+g[n] x[n] + g[n] x[n]

  6. Filter Structures • Why do we care about filter structures? • Study of filter structures gives us important insights into hardware implementations. • Digital filters are straight-forward to implement on FPGA chips using VHDL, AHDL, or graphical interface • Study of filter structures gives us important insights into software implementations • C • Fortran

  7. Structures for FIR filters • Recall the difference equation for an FIR: • This FIR requires M locations in memory

  8. Structures for FIR filters x[n] b0 + z-1 b1 z-1 bM

  9. Structure for IIR Filters (Systems) • Recall the general difference equation for IIR filters: IIR portion FIR portion

  10. Structure for IIR Filters x[n] y[n] b0 + + z-1 -a1 b1 z-1 b2 -a2

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