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Welcome: Intel Multicore Research Conference

Welcome: Intel Multicore Research Conference. David Kuck Dec. 8, 2005 Portland, OR. Intel Introduction. R&D at 75 WW Labs, with 7K people Budget $6B ~ 15% Revenue Software importance growing 3K people in Software & Solutions Group Corp Technology Group: SW, …

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Welcome: Intel Multicore Research Conference

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  1. Welcome: Intel Multicore Research Conference David Kuck Dec. 8, 2005 Portland, OR

  2. Intel Introduction • R&D at 75 WW Labs, with 7K people • Budget $6B ~ 15% Revenue • Software importance growing • 3K people in Software & Solutions Group • Corp Technology Group: SW, … • Some say 10K SW overall: 10% of employees • SW: widely used products … innovative R&D • Compilers, libraries, Vtune performance • Threading and Cluster Tools • Program expression, correctness, performance • BIOS, OS, middleware, management • ISV and user communities are the targets Intel Confidential

  3. Intel Hardware • Intel HW manufacturing • 1+ M chips per day, 15 Fabs WW • Revenue sources • Pentium, Itanium, IXA, Xscale, …. • Chipsets, white boxes, … • Architectures • Moore’s Law continues, but • Clock gains  Cores/ chip • 2 core chips now, 4 soon, … • Digital home, office, servers, … , petaflops Intel Confidential

  4. Multicore State Today • “Two for the price of one” • Works for a while, e.g. virus checking + computing • Multicore demands ISV development shift • ISVs have come to expect clock gains • “Free” performance gains drove functionality gains • Some differentiation energy going to parallelism now • Intel academic relations • Many styles, project-team relations best • 2006: New Intel program for joint multicore R&D Intel Confidential

  5. Big Parallelism Questions A. How to get parallelism into applications B. How to deliver performanceat runtime • A. Requirements for Parallel Applications @ ISVs • Best algorithms expressed as usable libraries • Adaptive, scalable libraries based on best algorithms • Much broader coverage than currently available • Rest of code expressed in flexible languages • Threads cause too many bugs and perf anomalies • OMP well structured but confining  TBB, others • Correctness and performance tools • Applications prototypes as demonstrations • Need to develop prototypes with ISVs/ users • Characterize these for analysis/simulation Intel Confidential

  6. Big Parallelism Questions • B. Realities of Runtime Parallel Performance • Single program running at maximum rate • Multiple programs running simultaneously • One-user multiprog. client or many users on servers • OS scheduling of jobs • Linux and Windows relationships with applications • HW/SW latencies and effective BW • Cache hierarchy • Interconnects and coherence – intra and inter-node • Atomicity of memory accesses  transactions Intel Confidential

  7. Parallelism Challenges • All of the above questions are important • Any one issue can ruin overall performance • Demands vary across applications • Program structure, data sizes • Single platform/system can’t satisfy everyone • “Customizable COTS” possible now, may grow • Clusters, interconnects, chipsets, processor types • SW variations Intel focusing on platforms, software, and systems Intel Confidential

  8. Conclusion • Conference goals: inform academia, solicit help • Innovative applications areas • Development SW • RT support SW • Successful projects will match Intel teams with academic groups • Joint activities for long-term success • Ideas flow both ways Intel Confidential

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