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Test Beam of TGC electronics in 2004 PowerPoint Presentation
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Test Beam of TGC electronics in 2004

Test Beam of TGC electronics in 2004

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Test Beam of TGC electronics in 2004

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  1. Test Beam of TGC electronics in 2004 Chikara Fukunaga (TMU) • Introduction • Member List • Electronics Setup • TGC Setup • Overlap problem in 2003 • Preliminary Results in 2004 • Plan for next beam test in Sept./Oct. this year ATLAS Muon Week in Seattle 30/June/04

  2. Introduction • In June 2004 TGC electronics has been also brought into H8 and made performance test with a 25ns bunch structured muon beam (we will do again in September). • The same electronics set has been used as in 2003. The current test is to confirm the performance we have achieved last year, and test trial of the configuration database. We will bring new (almost final) electronics before September. ATLAS Muon Week in Seattle 30/June/04

  3. TGC electronics Member List for June 2004 Beam Test • Israel Y.Benhammou, E.Etzion, A.Harel, L.Levinson, D.Lellouch, R.Lifshitz, N.Lupu, G.Mikenberg, S.Schwarzmann, S.Tarem • Japan O.Sasaki et al. (> 20 people participated) ATLAS Muon Week in Seattle 30/June/04

  4. TGC Test Beam Electronics Overview TTC/CCI ATLAS Muon Week in Seattle 30/June/04 Test ROD crate

  5. Electronics Setup The same set was used this time as one used in 2003 • Chamber (Triplet 32(Strip) x 24(wire), Doublet both 32 chan.) • ASD board (16ch.) x 2 PS pack • PS board {8 PP (32 ch.) ASICs (Product.), 2 SLB ASICs (Proto. Version 2) , 1 DCS-PS } x2 • Hi-pT crate • Forward Type Hi-pT board (4 Hi-pT ASIC (Proto. Version 3 ~ final) x1 • Proto. Star Switch (SSW) module x2 • HSC • ROD crates • Sector Logic for r-f coincidence • RODs (ROD and Test-ROD simultaneously in different crates) • TTC/CCI crate • TTCvi - TTCvx • CCI • Cables • AWT-28 40 twisted pair cable with 10 from ASDs to PS boards • Individually shielded TP Category-5 cable from PS board to Hi-pT crate 10m (ATLAS:15m) for LVDS • Optical fiber from Hi-pT crate to Sector Logic/ROD in the hut 30m (ATLAS:150m) for G-link. • DCS • Final DCS-PS board with ELMB, mezzanine on a PS board • Two DCS-PS boards ATLAS Muon Week in Seattle 30/June/04

  6. The chamber configuration has been slightly changed TGC Setup • T8 type chambers were used for all M1(Triplet), M2(Middle) and M3(Pivot). • In 2003 We used the same type chambers for both M2 and M3 – overlap problem • This year correct chamber set for M2 is used. • Trigger Electronics used was for forward type (PS-board, Hi-pT board) • Channels M1 M2 M3 Wire 24 32 30 Strip 32 32 32 ATLAS Muon Week in Seattle 30/June/04

  7. 10cm 10cm Wire Support overlap problem in 2003 Dwire~5cm Dstrip~4.5cm Dwire~5cm Dstrip~4.5cm M2 Middle M1 Triplet M3 Pivot The beam was injected just on the wire support accidentally ATLAS Muon Week in Seattle 30/June/04 ~Layer6 ~Layer7 Triplet Triplet Doublet Doublet

  8. Detection Efficiency distorted due to overlap in 2003 M1 M2 M3 M1M2 M3 ATLAS Muon Week in Seattle 30/June/04 Lower Efficiency due to Wire support Lower Efficiency due to Wire support Chamber efficiency (Wire) Chamber efficiency (Strip)

  9. Trigger Efficiency distorted by overlap in 2003 Triplet Low-pT logic :2 out-of- 3, 1 out-of-2 worked fine. ATLAS Muon Week in Seattle 30/June/04 Doublet Low-pT logic: 3 out-of-4 did not work because 2 ineff. chambers. Overlap of wire supports in 2 Identical chambers for M2 and M3

  10. 2004 Preliminary Results (1) • The trigger efficiency problem was cured this year using correct chamber setup for doublets ATLAS Muon Week in Seattle 30/June/04 High Trigger Efficiencies for both doublet strip and wire obtained in this year

  11. Preliminary Results (2) • HpT coincidence efficiency versus Chamber position Green: Trigger efficiency Red:Pt=6 Magenta:Pt=5 Blue:Pt=4 Cyan:Pt=3 Yellow:Pt=2 Black:Pt=1 ATLAS Muon Week in Seattle 30/June/04

  12. Preliminary Results (3) • Hi-pT and Sector Logic Trigger efficiencies versus PP ASIC Delay CurrentBunch Sector Logic Hi-pT Previous ATLAS Muon Week in Seattle 30/June/04 Next

  13. MDT-TGC Combined Test • TGC has stable runs with MUCTPI and full readout chain, together with the MDT tracking chambers and their alignment. A trigger efficiency of 99.5% was obtained with respect to reconstructed MDT tracks. ATLAS Muon Week in Seattle 30/June/04

  14. VERY Preliminary Result Summary • Low pT Trigger efficiency > 99.5% • High pT Trigger efficiency > 98.0% (~ SL efficiency) • SL output and MUCTPI input match perfectly > 99.99% • Electronics components for both on- and off- detector worked reliably, no problem. • Test trial of Integration of a Condition Database worked fine. • Need some more time for results of Combined Test Beam Analysis. ATLAS Muon Week in Seattle 30/June/04

  15. Hardware Update Plan (July and Aug.)for the Next Test Beam in Autumn • PS boardsof nearly- production-version with updated SLB ASICs (proto. ver.2 to ver.4, which is final one but 1 known bug) • Production-version Hi-pT boards with production version Hi-pT ASICs (so far proto. ver.3 has been used) + Anti-fuse FPGA • Nearly-final-design SSW boards (but FPGA is conventional one, Anti-fuse one will be mounted in the final one) ATLAS Muon Week in Seattle 30/June/04