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This lecture focuses on critical aspects of MOSFET behavior, including bulk-charge theory, body effect parameters, and channel length modulation. The modified Bulk-Charge model is discussed along with the determination of threshold voltage, VT, which varies with source-body voltage, VSB. Key insights into small-signal models and the impact of parasitics on MOSFET performance are presented. Additionally, the significance of cutoff frequency in amplifying signals and the relationship between operating frequencies and channel length are explored, particularly in PMOSFET configurations.
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OUTLINE The MOSFET: Bulk-charge theory Body effect parameter Channel length modulation parameter PMOSFET I-V Small-signal model Reading: Finish Chapter 17, 18.3.4 Lecture #38 EE130 Lecture 38, Slide 1
Problem with the “Square Law Theory” • Ignores variation in depletion width with distance y EE130 Lecture 38, Slide 2
Modified (Bulk-Charge) Model • linear region: • saturation region: EE130 Lecture 38, Slide 3
MOSFET Threshold Voltage, VT The expression that was previously derived for VTis the gate voltage referenced to the body voltage that is required reach the threshold condition: Usually, the terminal voltages for a MOSFET are all referenced to the source voltage. In this case, and the equations for IDS are EE130 Lecture 38, Slide 4
The Body Effect Note that VTis a function of VSB: where g is the body effect parameter When the source-body pn junction is reverse-biased, |VT| is increased. Usually, we want to minimizegso that IDsat will be the same for all transistors in a circuit EE130 Lecture 38, Slide 5
MOSFET VT Measurement • VT can be determined by plotting IDSvs.VGS, using a low value of VDS IDS VGS EE130 Lecture 38, Slide 6
Channel Length Modulation Parameter, l • Recall that as VDS is increased above VDsat, the width DL of the depletion region between the pinch-off point and the drain increases, i.e. the inversion layer length decreases. EE130 Lecture 38, Slide 7
P-Channel MOSFET • The PMOSFET turns on when VGS < VTp • Holes flow from SOURCE to DRAIN DRAIN is biased at a lower potential than the SOURCE • In CMOS technology, the threshold voltages are usually symmetric: VTp = -VTn VG • VDS < 0 • IDS < 0 • |IDS| increases with • |VGS - VTp| • |VDS| (linear region) VS VD GATE IDS P+ P+ N VB EE130 Lecture 38, Slide 8
PMOSFET I-V • Linear region: • Saturation region: m = 1 + (3Toxe/WT) is the bulk-charge factor EE130 Lecture 38, Slide 9
Small Signal Model • Conductance parameters: EE130 Lecture 38, Slide 10
Inclusion of Additional Parasitics EE130 Lecture 38, Slide 11
Cutoff Frequency • fmax is the frequency where the MOSFET is no longer amplifying the input signal • Obtained by considering the small-signal model with the output terminals short-circuited, and finding the frequency where |iout / iin| = 1 • Increased MOSFET operating frequencies are achieved by decreasing the channel length EE130 Lecture 38, Slide 12