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A HIGH PERFORMANCE VLSI FFT ARCHITECTURE

A HIGH PERFORMANCE VLSI FFT ARCHITECTURE. K. Babionitakis, K. Manolopoulos, K. Nakos, D. Reisis, N. Vlassopoulos and V.A. Chouliaras, Electronics, Circuits and Systems, ICECS. 13th IEEE International Conference on 10-13 Dec. 2006 pp. 810 – 813. Presenter: Cheng - Yeh Tsao. Outline.

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A HIGH PERFORMANCE VLSI FFT ARCHITECTURE

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  1. A HIGH PERFORMANCE VLSI FFT ARCHITECTURE K. Babionitakis, K. Manolopoulos, K. Nakos, D. Reisis, N. Vlassopoulos and V.A. Chouliaras, Electronics, Circuits and Systems, ICECS. 13th IEEE International Conference on 10-13 Dec. 2006 pp. 810 – 813. Presenter: Cheng - Yeh Tsao

  2. Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference

  3. Review FFT (Fast Fourier Transform) For 0 ≦ k ≦ N-1 DFT : O (N2) FFT : O (N/2 (logr N) )

  4. Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference

  5. The Radix-43 Algorithm(1/7)

  6. The Radix-43 Algorithm(2/7)

  7. The Radix-43 Algorithm(3/7)

  8. The Radix-43 Algorithm(4/7)

  9. The Radix-43 Algorithm(5/7)

  10. The Radix-43 Algorithm(6/7)

  11. The Radix-43 Algorithm(7/7)

  12. Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference

  13. Architecture(1/4) Overall FFT Architecture

  14. Architecture(2/4) R43 Butterfly Architecture

  15. Architecture(3/4) Radix-4 Butterfly Architecture

  16. Architecture(4/4) DFF:D Flip-Flop Accumulator Architecture

  17. Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference

  18. Architecture Advantages • Reduce the number of stages • Maximizing throughput • Large input data sets • Worst-case • 0.9V, 125℃ • 604.5 MHz • Typical conditions (1.0V, 25 ℃) • Exceeded the 1GHz rate

  19. Outline • Review FFT (Fast Fourier Transform) • The Radix-43 Algorithm • Architecture • Architecture Advantages • Reference

  20. Reference • A HIGH PERFORMANCE VLSI FFT ARCHITECTURE K. Babionitakis, K. Manolopoulos, K. Nakos, D. Reisis, N. Vlassopoulos and V.A. Chouliaras, Electronics, Circuits and Systems, ICECS. 13th IEEE International Conference on 10-13 Dec. 2006 pp. 810 – 813. • A New Approach to Pipeline FFT Processor S. He and M. Torkelson, Department of Applied Electronics, Lund University, S-22100 Lund, SWEDEN, 1996 IEEE. • 朱展毅老師的講義

  21. END

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