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Introduction to VLSI Programming High Performance DLX

Introduction to VLSI Programming High Performance DLX. (course 2 IN3 0) Prof. dr. ir. Kees van Berkel. Demonstrator ICs. Added value. 1985: modularity, ease of design (no value added to product!) 1990: low power (ESPRIT project  )

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Introduction to VLSI Programming High Performance DLX

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  1. Introduction toVLSI Programming High Performance DLX (course 2IN30) Prof. dr. ir.Kees van Berkel

  2. Demonstrator ICs Kees van Berkel

  3. Added value • 1985: modularity, ease of design (no value added to product!) • 1990: low power (ESPRIT project ) • 1992: low noise, low EME (Electro-Magnetic Emission) • 2000: ... Kees van Berkel

  4. Added value: low powerDCC Error Corrector Kees van Berkel

  5. A sync-async “arms race” Kees van Berkel

  6. Added value: Low Power Synchronous 80C51 - Asynchronous 80C51 Kees van Berkel

  7. Added value: Low EM Emission Kees van Berkel

  8. Roadblock: circuit sizethe 80C51 learning curve 1995/6 1999/4 Kees van Berkel

  9. Asynchronous DSP circuit . Vdd DC/DC Vdd’ fifo Asynchronous DSP circuit in fifo out Asynchronous DSP circuit Asynchronous DSP circuit “Just in time” processing Kees van Berkel

  10. ADPCM Kees van Berkel

  11. ADPCM Kees van Berkel

  12. ADPCM Kees van Berkel

  13. Industrialization of the Technology • Philips Semiconductors Zürich (1994 Dec): “We want to set a world record in low power, .. by using asynchronous technology.” • Their choice for a vehicle: the 80C51 micro-controller (used in many consumer products). • Result: 4× less power, minimal EME. • Follow-up: pager baseband ICs, … In parallel: transfer and upgrade of tools + design flow Kees van Berkel

  14. Pager Baseband Controller ICs Myna pager: • FLEX™ protocol • 32 alphanumeric messages • a single AAA battery (1V) • up to 25 weeks battery life Pager baseband controller ICs: • PCA5007, PCA 5010 • http://www.semiconductors.philips. com/pip/PCA5007 • http://www.win.tue.nl/pa/wsinap/ async.html Kees van Berkel

  15. 1998-Sep: the PCA 5007 Kees van Berkel

  16. LCD EMI I2C I Receiver PCA 5007 Baseband Controller Memory 25V Q #   M A new generation of pagers:a common platform for all standards Kees van Berkel

  17. EMI: a critical design factor (Electro-Magnetic Interference) • Antenna signal may be as small as 25V. • Clock harmonics of synchronous micro-controllers interfere with RF (X00MHz). • With asynchronous 80C51: signal decoding by means of (standard-specific) software. (This also enables upgrading/downloading!) • Furthermore: no shielding is required between controller and RF receiver. Kees van Berkel

  18. PCA5007 block diagram Kees van Berkel

  19. Contactless smartcard IC (ESPRIT project DESCALE) Power regulator 80C51 micro-controller DES engine UART RAM, ROM, EEPROM 13.56 MHz clock power (a few mW) bi-directional communication (106 kbit/s) Radio link: Kees van Berkel

  20. Properties a) low average power lower peak power speed adaptation Merits Maximum speed for received power (a,c) Robust operation against voltage drops (c) Smaller buffer capacitor (b,c) Contactless smartcard IC Kees van Berkel

  21. Conclusion • First asynchronous VLSI circuits on the market (high volume sales). • Prospects for more async products look good. • Added value: low power, EME performance. • Added costs: test, IC area, being different. • Asynchronous VLSI technology: • there is room for it in market niches, • … but it may contribute to main-stream VLSI. Kees van Berkel

  22. Bibliography • Computer Architecture; a Quantitative Approach (3rd Ed.); John L Hennessy & David A Patterson; Morgan Kaufmann Publishers Inc, 1996. • ARM System Architecture; Steve Furber; Addison Wesley, 1996. • DSP Processor Fundamentals, Architectures and Features; Phil Lapsey et al (Berkeley Design Technology Inc.), IEEE, 1996. • www.handshakesolutions.com • www.arm.com/news/6936.html • www.research.philips.com/ newscenter/archive/2004/handshake.html Kees van Berkel

  23. Lab-work and report You are allowed to team up with a colleague (Not mandatory.) Report: more thanlisting of functional Tangram programs: • analyze the specifications and requirements; • present design options, alternatives, trade-offs; • motivate your design choices; • explain functional correctness of your Tangram programs; • analyze & explain {area, time, energy} of your programs. Kees van Berkel

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