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RPC D etector C ontrol S ystem for MTCC. Pierluigi Paolucci, Anna Cimmino I.N.F.N. of Naples Giovanni Polese Lappeenranta University. Hardware Structure. The final Hardware configuration for MTCC has been upload into PVSS, using the barrel hardware already delivered and tested at 904.
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RPC Detector Control Systemfor MTCC Pierluigi Paolucci, Anna Cimmino I.N.F.N. of Naples Giovanni Polese Lappeenranta University Giovanni Polese
Hardware Structure • The final Hardware configuration for MTCC has been upload into PVSS, using the barrel hardware already delivered and tested at 904 • BARREL • 1 Mainframe • 2 branch • 2 LV Easy • 1-2 HV Easy • 3 LV Boards ( 1 per sector) • 4 HV Boards (8 ch. for sector) • ENDCAP • 1 branch • 1 LV Easy • 1 LV boards • 2-4 HV boards Giovanni Polese
FSM Hierarchy structure • The Endcap and Barrel have two different tree structures under a single top node as required by the CMS DCS Integration guidelines. This two systems can still work completely in standalone. • The endcap is up to date with the barrel and the two systems are proceeding in parallel • A branch in both system trees describes the hardware view. • The system is now divided in 3 parts and spitted in 2 PCsona distributed network, as required into guidelines. PC01 CMS_RPC Barrel RPC Endcap RPC CU Wheel Disc Barrel Supervisor Endcap Supervisor Sector Ring LU Chamber Chamber Channel Channel Device level Device level NEW LEVEL HV/LV Sys HV/LV Sys PC02..03 Giovanni Polese
RPC System for MTCC Giovanni Polese
Sector & Ring Trending Plot • A set ofhistory plot panels allow to follow the evolution of the main chamber parameters. • Different history panels for HV and LV • For every plot it’s possible to change axis, zoom, freeze and export the data in cvs New Giovanni Polese
Hardware view New • Available from the top node • Show a complete mapping of all crates connected to every branch controllers • Historical plot allows to see the temperature evolution for every boards in the crates • Clicking on each board it’s possible to see board details and the logic channels name Giovanni Polese
Configuration DB • The hardware configuration for MTCC has been upload into DB: the hardware and logical structure with settings and alarm thresholds for the entire system. • We have created two different recipes for ON and STANDBY states with different V0 settings (6000 V for standby and 9500 V for ON) • We have a problem with the JCOP Configuration db tools in the CAEN EASY Crate archiving. When we fix it, with new DB Component version, we will be able to create the CMS_RPCfwHardware Component Giovanni Polese
Condition DB • Now we are able to write in and read from devdb database where has been created the same Condition db structure for PVSS, thanks to Angela Brett. • We are in contact with RPC DB team and with M. Abbrescia to have to possibility to move it on final SX5 server. We hope that in a couple of days we will move to it , create the DB structure and test the performance. • Parameters to archive for all channels: V0, I0, Vmon, Imon, Actual_status (info about main alarm conditions: trip, Ovc, UnV, OvV), board temp with deadband to 1-2% Giovanni Polese
What we have done • The DCS system is almost ready for the MTCC and it will be moved on PCs in the Green Barrack in the third week of May. • Supervisor Component is ready and works correctly, the hardware component is under test • All sectors and chambers for the Cosmic Challenge have been created in the hardware and logical system view. • Communication and running tests have been performed at 904 using real hardware. Everything is working properly. • Integration with CMS DCS is almost ready, some common problems will be fix with new JCOP framework release Giovanni Polese
To be done for MTCC • Move to RPC condition db on SX5 and test the performance. • Release the CMS_RPCfwHardware Component • Help our Warsaw friends, creating a control and monitoring system of the LB low voltage, and integrate it into the RPC DCS. • Do we want to integrate it in the FSM ?? It will be also discussed tomorrow in the DCS working group. • Test all the system when the hardware will be ready at SX5 (June 06). • Write documentation and organize training in order to have more people ready to take data. Giovanni Polese