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Memory - 2

Memory - 2. Memory. The internal structure of the ICs ROM Types and RAM. Memory Types. How a ROM works. A 128 x 1 ROM. The basic structure. Larger Array Sizes. Arranged in blocks. Commercial ROM Types. Table 9-5 Type Tech ReadCyc WrCyc Comments

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Memory - 2

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  1. Memory - 2 ECE 561 - Lecture 13 Memory 2

  2. Memory • The internal structure of the ICs • ROM Types and RAM ECE 561 - Lecture 13 Memory 2

  3. Memory Types • How a ROM works ECE 561 - Lecture 13 Memory 2

  4. A 128 x 1 ROM • The basic structure ECE 561 - Lecture 13 Memory 2

  5. Larger Array Sizes • Arranged in blocks ECE 561 - Lecture 13 Memory 2

  6. Commercial ROM Types • Table 9-5 • Type Tech ReadCyc WrCyc Comments • MASK ROM NMOS 10-100ns 4 weeks Write once, low pwr • CMOS • MASK ROM Bipolar <100ns 4 weeks Write once, h pwr • low density • PROM Bipolar <100ns 10-50us/byte Write once, h pwr • EPROM NMOS 25-200ns 10-50us/byte Reusable, low pwr • CMOS • EEPROM NMOS 50-200ns 10-50us/byte 10,000 to 100,000 • writes per location ECE 561 - Lecture 13 Memory 2

  7. EPROM • Erasable Programable Read Only Memory ECE 561 - Lecture 13 Memory 2

  8. EPROM • Uses a floating gate for the FET at each bit location • User uses a programming voltage that causes a temporary breakdown in the dielectric between the gate and the floating gate to charge it. • When programming voltage is removed the charge stays • How long? EPROM manufacturers “guarantee” properly programmed bit has 70% of charge after 10 years. • Use UV light to erase ECE 561 - Lecture 13 Memory 2

  9. EEPROM • Electrically Erasable PROM • Like the EPROM only electrically erasable in circuit. • Many times referred to a “flash” programmable memory • Very slow on writes so not a substitute for RAM ECE 561 - Lecture 13 Memory 2

  10. General Block Diagram xROM ECE 561 - Lecture 13 Memory 2

  11. General Timing • General timing parameters ECE 561 - Lecture 13 Memory 2

  12. The timing parameters • Access time from address – tAA • Access time from chip select - tACS • Output-enable time - tOE • Output-disable time - tOZ • Output-hold time - tOH ECE 561 - Lecture 13 Memory 2

  13. R/W Memory • Memory to store and retrieve data when more than F/Fs • A few types • Static RAM – SRAM • As long as power is maintained data is held ECE 561 - Lecture 13 Memory 2

  14. SRAM • The data storage ECE 561 - Lecture 13 Memory 2

  15. A static RAM chip • Internal – an arrangement of storage sturctures ECE 561 - Lecture 13 Memory 2

  16. SRAM Timing • Timing for write similar (see Fig 9-23) ECE 561 - Lecture 13 Memory 2

  17. DRAM • Next step in memory is Synchronous SRAM which has a clocked interface for control, address and data. • Then comes DRAM – dynamic ram • In DRAM data is stored • in a semiconductor • capicator. ECE 561 - Lecture 13 Memory 2

  18. DRAM Read • A read sees the bit line precharged to high. • The word line is then activated • If cell stores a 0 then there is a small drop on the voltage on the bit line • This is monitored by a sense amp which provides the value stored • Value must be written back after the read. ECE 561 - Lecture 13 Memory 2

  19. DRAM Refresh • Charge stored leaks off over time • Must restore the values stored • A 4096 row DRAM – refresh every 64ms • Thus each row every 15.6 usec • Larger DRAMs are banks of smaller ECE 561 - Lecture 13 Memory 2

  20. DDR SDRAM • Double data rate SDRAM • Double the data transfer rate of an SDRAM by transferring on both edges of the clock • Access and setup times are the same as SRAM • Increased data thruput as data is transferred in blocks. ECE 561 - Lecture 13 Memory 2

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