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Lecture 7 Integer Arithmetic

Lecture 7 Integer Arithmetic. Assembly Language for Intel-Based Computers , 4th edition Kip R. Irvine. Integer Arithmetic. Shift and Rotate instructions Sample Applications Extended Addition and Subtraction Multiplication and Division ASCII and Packed Decimal Arithmetic.

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Lecture 7 Integer Arithmetic

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  1. Lecture 7Integer Arithmetic Assembly Language for Intel-Based Computers, 4th edition Kip R. Irvine

  2. Integer Arithmetic • Shift and Rotate instructions • Sample Applications • Extended Addition and Subtraction • Multiplication and Division • ASCII and Packed Decimal Arithmetic

  3. Shifting and rotating • Shifting: The bits a shifted left or right. Some bits may be lost.Example: Shift 00001101 1 bit rightAdded00000110 Lost • Rotating: The bits shift out of one end of the data are placed at the other end of the data so nothing is lost.Example: Rotate 10001101 2 bits to the left: 00110110

  4. SHL (Shifting bits to the left) • To shift 1 bit to the left we use: • SHL dest(reg/mem),count(imm8/CL) • the msb (most significant bit) is moved into CF (so the previous content of CF is lost) • each bit is shifted one position to the left • the lsb (least significant bit) is filled with 0 • dest can be either byte, word or dword • Ex: • mov bl,82h ; BX = _____ • shl bl,1 ; BX = _____, CF = __(only BL and CF are changed)

  5. 0 1 0 0 0 0 0 1 0 Shifting bits to the left Before CF BL After SHL BL, 1 1 0 0 0 0 0 1 0 0

  6. Shifting multiple times to the left • SHL affects SF, PF, ZF according to the result • CF contains the last bit shifted from the destination • OF = 1 iff the last shift changes the sign bit • mov bh,0B2h ;BH = 1011 0010bshl bh, 1 ;BH= ______b, CF=__, OF=__shl bh, 2 ;BH= ______b, CF=__, OF=__ • Overflows are signaled only for the last bit shifted

  7. Fast Multiplication • Each left shift multiplies by 2 the operand for both signed and unsigned interpretations. Ex: • mov al,4 ;AL = 04h = 0000 0100b = 4 • shl al,1 ;AL = 08h= ______________b = ____ • shl al,2 ;AL = 20h= ______________b = ____ • mov bl,-1 ;BL = FFh= ______________b = ____ • shl bl,3 ;BL = F8h= ______________b = ____

  8. Fast Multiplication • Cycles Instruction808880486PentiumSHL reg, 1231SHL reg, immed - 2 1SHL reg, CL8 + 4n34MUL reg byte 70-7713-1811 word 118-13313-2611 doubleword N/A13-4210 • Source: 8088, 80486: Reference Microsoft MASM, Microsoft Corporation, 1992 • Source: Pentium: Pentium.txt, MASM 6.13 update, Microsoft Corporation, 1993

  9. Fast Multiplication • Multiplication by shifting is very fast. Try to factor your multiplier into powers of 2: • AX * 36 = AX * (32 + 4) = AX*32 + AX*4 • So add (AX shifted by 5) to (AX shifted by 2) • That is, we might replace a multiply by 36 instruction by copy AX to BXshift AX left 5 bits (32 * AX)shift BX left 2 bits (4 * AX)add BX to AX (36 * AX)

  10. 8088 cycles 2 4* 8+4*5 = 28* total = 41 2 2 3 Normal multiplication 4 total = 113-133 117-137 mov CX, 36mul CX Fast Multiplication • Multiplication using shifts on 8088mov BX, AXmov CL, 5shl AX, CLshl BX, 1shl BX, 1add AX, BX * Replace by 5 shl AX, 1commands total = 19

  11. Normal multiplication imul AX, 36 Fast Multiplication 486 cycles Pentium 1 1 2 1 2 1 1 1Total 6 4 • Multiplication using shifts on 486 Pentiummov BX, AXshl AX, 5shl BX, 2add AX, BX 13-26 11

  12. SHR (Shifting bits to the right) • To shift to the right use: SHR dest(reg/mem),count(imm8/CL) • the msb of dest is filled with 0 • the lsb of dest is moved into CF • Each single-bit right shift divides the unsignedvalue by 2. Ex: • mov bh,13 ;BH = ______b = 13 • shr bh,2 ;BH = ______b = 3 (div by 4), CF = 0 • (the remainder of the division is lost)

  13. Arithmetic Shift SAR • Is needed to divide the signed value by 2: SAR dest(reg/mem),count(imm8/CL) • the msb of dest is filled with its previous value (so the sign is preserved) • the lsb of dest is moved into CF

  14. Arithmetic Shift • mov ah,-15 ;AH = 1111 0001bsar ah,1 ;AH = ________________b =-8the result is rounded down (-8 instead of -7…) • In contrast, shr ah,1 gives____________b = 78h • SAL is the same as SHLIt is just interpreted as being for signed arithmetic

  15. Rotate (without the CF) • ROL rotates the bits to the left (same syntax) • CF gets a copy of the original msb • ROR rotates the bits to the right (same syntax) • CF gets a copy of the original lsb • CF and OF reflect the action of the last rotate

  16. Examples of ROL and ROR • mov ah,40h ;ah = 0100 0000b • rol ah,1 ;ah = 1000 0000b, CF = 0 • rol ah,1 ;ah = 0000 0001b, CF = 1 • rol ah,1 ;ah= ____________b, CF = ___ • mov ax,1234h ;ax = 0001 0010 0011 0100b = 1234h • ror ax,4 ;ax = 4123h • ror ax,4 ;ax = 3412h • ror ax,4 ;ax = 2341h

  17. Rotate with CF • RCL rotates to the left with participation of CF • RCR rotates to the right with participation of CF

  18. Ex: Reversing the content of AL • Ex: if AL = 1100 0001b, we want to reverse the order of the bits so AL = 1000 0011b • mov cx,8;number of bits to rotate • start: • shl al,1 ;CF = msb of AL • rcr bl,1;push CF into msb of BL • loop start;repeat for 8 bits • mov al,bl ;store result into AL

  19. SHLD/SHRD Instructions • SHLD: • SHLD dest, Source, count(imm8/CL) • Shift a dest. a given number of bits to the left • The bit positions opened up by the shift are filled by the msb of the source operand • SHRD: • SHRD dest, Source, count(imm8/CL) • Shift a dest. a given number of bits to the right • The bit positions opened up by the shift are filled by the lsb of the source operand

  20. 3BAC AC36 AC36 6786 SHLD/SHRD Instructions • Formats: • SHLD/SHRD reg16, reg16, imm8/CL • mem16, reg16, imm8/CL • reg32, reg32, imm8/CL • mem32, reg32, imm8/CL • Examples: • .data • lval word 923Bh • .code • mov ax,0AC36h • mov bx, 786Ah • shld lval, ax, 8 • shrd bx, ax, 4 lval AX 923B AC36 AX BX AC36 786A

  21. Application: Binary Output • To display the number in BX in binary: • MOV AH,2 ;display • MOV CX,16 ; 16 chars • START: ROL BX,1 ;CF gets msb • JC ONE ;if CF =1 • MOV DL,’0’ ;print '0' • JMP DISP • ONE: MOV DL,’1’ ;print '1' • DISP: INT 21h ;print

  22. Multiplying with shifts and adds • Some early CPUs lacked hardware multiply • Solution: Shift and add routines • Advantage: "Cheaper" • Disadvantage: Slow • Algorithm show here is simple, faster ones are available. Neat feature: it calculates a double width product using single width operations except for rotating

  23. Multiplying with shifts and adds • Algorithm:Assumes BL contains multiplicand DL contains multiplier 1. Initialize Clear accumulator AX Put 8 in CX 2. Repeat 8 times (once per bit of multiplier) Shift DL right by 1 bit into CF If CF = 1, Add BL to AH with carry in CF Rotate AX (include CF) The result is in AX.

  24. Multiplying with shifts and adds • Multiply PROC XOR AX, AX MOV CX, 8Repeat1: SHR DL, 1 JNC Lskip ADD AH, BLLSkip: RCR AX, 1 LOOP Repeat1 RETMultiply ENDP

  25. Multiplying with shifts and adds • 4 bit example 0110 * 1010DL = 1010 0101 0010 shiftCF = ? 0 1BL = 0110 0110 0110 AX = 0000 0000 0110 0000 addCF = 0AX = 0000 0000 0011 0000 rotateCX = 4 3 2

  26. Multiplying with shifts and adds • 4 bit example 0110 * 1010 continuedDL = 0001 0000 shiftCF = 0 1 BL = 0110 0110 AX = 0111 1000 addCF = 0AX = 0001 1000 0011 1100 rotateCX = 1 0

  27. Extended Addition • Question: Early microcomputers were only 8 bit machines. How could you add 16 or 32 bit integers? On 16 bit machines how do you add 32 bit integers? • Intel solution: ADC dest, sourceUsage rules are the same as for ADD • dest = dest + source + carry flag • Example • AX = 1000h, BX = 20, CF = 1ADC AX, BX ; AX=_______h

  28. Add dWord2 to dWord1 • dWord1 dd ? dWord2 dd ? … (Using byte arithmetic) mov al, byte ptr dWord2 add byte ptr dWord1, al mov al, byte ptr dWord2+1 adc byte ptr dWord1+1, al mov al, byte ptr dWord2+2 adc byte ptr dWord1+2, al mov al, byte ptr dWord2+3 adc byte ptr dWord1+3, al

  29. Extended Subtraction • SBB - subtract with borrow • SBB destination, source destination = destination - source - CF • Usage: just like ADC AX = 1000h, BX = 20, CF = 1SBB AX, BX ; AX =______h;

  30. Extended Subtraction • Example: Calculate X = X - Y where X and Y are double words on a 8088 with only 16 bit registers • X dd 1023321Y dd 342232… mov ax, word ptr Y sub word ptr X, ax mov ax, word ptr Y+2 sbb word ptr X+2, ax

  31. Integer Multiplication: A Consideration • Question: if we multiply an bit number by another, how long could the product be? • Example n = 41111 x 1111 1111 1111 1111 1111 11100001 • The product of two n bit numbers can be 2n bits long

  32. Integer Multiplication - the problem • The product of two n bit numbers can have up to 2n bits • In high level languages, the product of two n bit numbers can have at most n bits • Question: If you designed the hardware, would the product of two n bit numbers have n bits or 2n bits? • VAX - n normally8088 - 2n normally

  33. Integer Multiplication: A Consideration • Contrary to addition, the multiplication operation depends on the interpretation: • Consider byte problem: FFh x 02h = ?? • unsigned interp.: 255 x 2 = 510 = 01FEh • signed interpret.: -1 x 2 = -2 = FFFEh • We thus have two different multiplication instructions: • MUL source ;for unsigned multiplication • IMUL source ;for signed multiplication • Where source must be either mem or reg

  34. Multiplication (cont.) • MUL sourceIMUL source • Notation:Multiplicand x multplier = product • byte source AL x source = AXword source AX x source = DX:AXdword source EAX x source = EDX:EAX • Hence, there is always enough storage to hold the result

  35. Multiplication (cont.) • Nevertheless, CF=OF=1 iff the result cannot be contained within the least significant half (lsh) of its storage location • lsh = AL if source is of type byte • lsh = AX if source is of type word • lsh = EAX if source is of type dword • For MUL: • CF=OF=0 iff the most significant half (msh) is 0 • For IMUL: • CF=OF=0 iff the msh is the sign extension of the lsh

  36. Examples of MUL and IMUL • Say that AX = 1h and BX = FFFFh, then: • Instruction Result DX AX CF/OF • mul bx 65535 0000 FFFF 0 • imul bx -1 FFFF FFFF 0 • Say that AX = FFFFh and BX = FFFFh, then: • Instruction Result DX AX CF/OF • mul bx 4294836225 FFFE 0001 1 • imul bx 1 0000 0001 0

  37. Examples of MUL and IMUL (cont.) • AL = 30h and BL = 4h, then: • Instruction Result AH AL CF/OF • mul bl 192 00 C0 0 • imul bl 192 00 C0 1 • AL = 80h and BL = FFh, then • Instruction Result AH AL CF/OF • mul bl 32640 7F 80 1 • imul bl 128 00 80 1

  38. Multiplication: An observation • Observe: The differences between the double length products for signed and unsigned multiplication occur in the most significant (left) half. • In machines with single length products, the same instruction can be used with both signed and unsigned multiplication

  39. Additional Multiplication Formats • Question: Originally Intel believed in double length product. What do they think now? • New multiplication instructionsIMUL register, immediate (.286) ; register = register * immediateIMUL register1, register2, immediate (.286) ; register1 = register2 * immediateIMUL register1, register2/memory (.386) ; register1 = register1 * register2 ; register1 = register1 * memory • All yield single length products!

  40. Integer Division • Notation for integer division: • Ex: 7 ¸ 2 = 3 r 1 • dividend ¸divisor = quotient r remainder • We have 2 instructions for division: • DIV divisor ;unsigned division • IDIV divisor ;signed division • The divisor must be reg or mem • Convention for IDIV: the remainder has always the same sign as the dividend. • Ex: -5 ¸ 2 = -2 r -1 (not -3 r 1)

  41. Division (cont.) • The divisor determines what will hold the dividend, the quotient, and the remainder: • DivisorDividendQuotientRemainder • byte AX AL AH • word DX:AX AX DX • dword EDX:EAX EAX EDX • The effect on the flags is undefined • We have a divide overflow whenever the quotient cannot be contained in its destination (AL if divisor is byte...) • execution then traps into INT 0h which displays a message on screen and returns control to DOS

  42. Examples of DIV and IDIV • DX = 0000h, AX = 0005h, BX = FFFEh: • Instruction Quot. Rem. AX DX • div bx 0 5 0000 0005 • idiv bx -2 1 FFFE 0001 • DX = FFFFh, AX = FFFBh, BX = 0002h: • Instruction Quot. Rem. AX DX • div bx Divide Overflowidiv bx -2 -1 FFFE FFFF

  43. Examples of DIV and IDIV (cont.) • AX = 0007, BL = FEh: • Instruction Quot. Rem. AL AH • div bl 0 7 00 07 • idiv bl -3 1 FD 01 • AX = 00FBh, BL = FFh: • Instruction Quot. Rem. AL AH • div bl 0 251 00 FB • idiv bl Divide Overflow • because 251/(-1) = -251 < -128

  44. Preparing for a division • Recall that: • For a byte divisor: the dividend is in AX • For a word divisor: the dividend is in DX:AX • For a dword divisor: the dividend is in EDX:EAX • If the dividend occupies only its least significant half (lsh) we must prepare its most significant half (msh) for a division • For DIV: the msh must be zero • For IDIV: the msh must be the sign extension of the lsh

  45. Preparing for IDIV • To fill the msh of the dividend with the sign extension of its lsh, we use: • CBW (convert byte to word): fills AH with the sign extension of AL • CWD (convert word to double word): fills DX with the sign extension of AX • CDQ (convert double to quad): fills EDX with the sign extension of EAX • Sign extension (recall): • if AX = 8AC0h, then CWD will set DX to FFFFh • if AX = 7F12h, then CWD will set DX to 0000h

  46. Preparing for DIV or IDIV • If AX and BX contain unsigned numbers, to perform AX / BX, you must do • xor dx,dx ;to fill DX with 0 ; faster than mov dx, 0 • div bx • If AX and BX contain signed numbers, to perform AX / BX, you must do • cwd ; fill DX with sign extension of AX • idiv bx • Never assign the msh of the dividend to zero before performing IDIV

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