1 / 14

University of Manchester: Progress on LNA Programme

University of Manchester: Progress on LNA Programme. B. Boudjelida , A. Sobih, A. Bouloukou, S. Arshad, S. Boulay, J. Sly and M. Missous School of Electrical and Electronic Engineering University of Manchester. Inductors. Capacitors. ~ 5 cm. ~ 1 mm. pHEMTs. Resistors. OUTLINE.

dante
Télécharger la présentation

University of Manchester: Progress on LNA Programme

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. University of Manchester:Progress on LNA Programme B. Boudjelida, A. Sobih, A. Bouloukou, S. Arshad, S. Boulay, J. Sly and M. Missous School of Electrical and Electronic Engineering University of Manchester

  2. Inductors Capacitors ~ 5 cm ~ 1 mm pHEMTs Resistors OUTLINE • Introduction • LNA Elements • Modelling (pHEMTs and passives) • Noise measurements • LNA Results • MMIC using InP (RF + noise) • MIC using off-the shelves components (AVAGO + NEC transistors) • Noise predictions for next LNA • Conclusions

  3. Noise measurements Material assessment DC & RF measurements Parameter extraction & device modelling Material growth Process set-up and fabrication Introduction Workflow at University of Manchester LNA building blocks library Process set-up LNA circuit design LNA layout design LNA Fabrication! LNA Measurement LNA testing

  4. Good agreement between linear, non-linear and measured data. For all passives, good “scalable” models successfully obtained as a function of physical parameters Modelling: passives and pHEMTS LNA Elements 4 x 200 µm (XMBE109-Run1) Vp = -1.3 eV Gm = 300 mS/mm Ft~ 30 GHz Fmax~ 35 GHz

  5. XMBE109 – 4x200 μm device: Noise figure in a 50Ω system at different bias points (Freq=1GHz). InGaAs/InAlAs pHEMTs Noise Measurements LNA Elements  VDS=1V : NF50 ~ 1dB (lower for higher current)  Lowest NF for lower VDS : WHY?  Gate leakage due to impact ionization! For better noise, the devices MUST be biased at low VDS  good for power dissipation!

  6. 1.40 1.20 1.00 NFmin (dB) 0.80 0.60 0.40 0.20 0.00 0.3 0.8 1.3 1.8 2.3 2.8 Frequency (GHz) LNA Elements InGaAs/InAlAs pHEMTs Noise Measurements Independent Lab: MC2 (spin-off IEMN Lille) VDS=1V; 10%IDSS • Extraction of the noise parameters relies on the equivalent circuit. • NFmin ~ 0.5 dB @ 1GHz XMBE109 – 4x200 μm device: Minimum noise figure extracted from the “F50” method.

  7. 0.16 0.14 0.12 0.10 NFmin (dB) 0.08 0.06 0.04 0.02 0.00 0.3 0.8 1.3 1.8 2.3 2.8 Frequency (GHz) LNA Elements InGaAs/InAlAs pHEMTs Noise Measurements Independent Lab: MC2 (spin-off IEMN Lille) VDS=1V; 10%IDSS • Measurement independent of the equivalent circuit! • Expensive… requires accurate tuners. • NFmin ~ 0.05 dB @ 1GHz !! • This method is believed to give more accurate results BUT the “true” NFmin is likely to lie between the 2 measurement methods. •  NFmin ~ 0.2 dB @ 1GHz XMBE109 – 4x200 μm device: Minimum noise figure measured using the multi-impedance method (tuner).

  8. GSG - 100μm pitch probes GSG - 100μm pitch probes LNA layout LNA circuit Fabricated LNA Comments: No input inductor, use of large resistor, parameters optimized for best performance Ld series resistance + Rb are used for biasing the drain LNA Results InP MMIC design, fabrication and measurement Transistor biased at 20% IDSS (VD = 1V ; ID~40 mA)

  9. LNA Results InP MMIC RF and Noise results Discrepancies with noise highly likely to be due to NiCr resistors process Could also be due to measurement issues (no decoupling probes for DC feed)

  10. LNA Results MIC design, fabrication and measurement • Goals: • Demonstrate the validity of the model predictions • “Easy-to-assemble” using commercial off the shelves components • Could be used for demonstrators such as 2PAD NEC transistors, Double-stage circuit, optimised for 0.4-2 GHz operation

  11. LNA Results MIC design, fabrication and measurement 8 different LNAs designed using NEC and Avago transistors Single and double-stage circuits being measured now! • Very good noise predictions! NF < 0.6 dB !

  12. LNA Results InP MMIC predictions LNA circuit Comments: Input bias and impedance match off-chip L series resistances used for drain biasing

  13. LNA Results InP MMIC predictions NF< 0.35 dB from 0.3 to 1.6 GHz

  14. Conclusions • Super low noise InGaAs/InAlAs pHEMTs technology demonstrated • NFmin < 0.2 dB @ 1GHz using the 1 µm gate geometry • The first full MMIC LNA successfully modelled, fabricated and tested MMIC • Still very good agreement between measurement and models using the equivalent circuit models • The measured NF in the 50Ω system is also higher than what predicted by the simulations  due to Resistors (under investigation, 2nd MMIC run under way) • The first fabricated MICs yield measured NF as low as 0.6 dB (~42K) MIC • Noise predictions demonstrated Next LNA expected to go below 0.35 dB (25K) at RT in a 50Ω system between 0.3 to 1.6 GHz

More Related