Input/Output The messiest part of O.S. Chap11. Speed difference of I/O Hardware. Device Controllers. I/O devices have components: mechanical component electronic component The electronic component is the device controller may be able to handle multiple devices Controller's tasks
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Device Controllers • I/O devices have components: • mechanical component • electronic component • The electronic component is the device controller • may be able to handle multiple devices • Controller's tasks • convert serial bit stream to block of bytes • perform error correction as necessary • make available to main memory
Memory-Mapped I/O (2) (a) A single-bus architecture (b) A dual-bus memory architecture
I/O Architecture • Several types of bus,such as ISA, EISA,PCI and MCA, are currently in use. • data bus – the pentium has 64 bit wide data bus • Address bus – • Control bus – a group of lines that transmit control information to the connected circuits. The Pentium uses control lines to specify, for example, whether the bus is used to allow data transfers between a processor and the RAM, or alternatively, between a processor and an I/O device.
PC’s I/O architecture • When a bus connects to the CPU to an I/O device, it is called an I/O bus. • 80x86 use 16 out of the 32 address lines to address I/O devices and 8,16, or 32 out of the 64 data lines to transfer data
I/O ports • Each device connected to the I/O bus has its own I/O address, which are usually called I/O ports • PC provides up to 65536 8-bits I/O ports. Two consecutive 8-bit ports may be regarded as a single 16-bit port. • Four assembly instructions in,ins,out,outs allow CPU to read and write into an I/O port
Memory mapped I/O ports in PC • PC’s device I/O ports may also be mapped into address of physical address space. • O.S. can use mov instruction that operate directly on memory. • Modern hardware devices are more suited to mapped I/O, since it is faster and can be combined with DMA
I/O and registers • The I/O ports of each device are actually structured into a set of specialized registers • CPU write commands to control registers • CPU reads a value that represents the internal state of the device from status register • CPU fetch data from a device by reading input register • CPU push data to device by writing bytes into output registers
Specialized I/O ports Control register Device’s I/O Interface CPU Status register input register Output register
To lower costs, the same I/O port is often used for different purposes. e.g., some bits describe the device state and others are used to specifycommands.e.g., the same I/O ports may be used as an input register or an output register
What is an I/O interface? • An I/O interface is a hardware circuit inserted between a group of I/O ports and the corresponding device controller. • It acts as an interpreter that translates the values in the I/O ports into commands and data for the device.
Types of I/O interfaces • Custom I/O interfaces • devoted to one specific hardware device • usually, the device controller is on the same card of I/O interfaces. • General-purpose I/O interface • used to connect several different hardware devices
General –purpose I/O interface • Parallel port • traditionally connected to printers, but can also be connected to removable disks, scanners • Serial port • one bit at a time • use UART chip (Universal Asynchronous Receiver and Transmitter) to string out the bytes into a sequence of bits. • Universal serial bus (USB) • PCMCIA interface • SCSI (Small Computer System Interface) Interface
Device Controller • It interprets the high-level commands received from the I/O interface and force the device to execute specific actions by sending proper sequence of electrical signals • It converts and properly interprets the electrical signals received from the device and modifies (through the I/O interface) the value of the status register
I/O shared memory • Several hardware device sometimes include their own memory, which is often called I/O shared memory. E.g. graphic cards.
PC’s mapping addressesof I/O shared memory • For device connected to ISA bus • mapped into physical address from0xa0000 to 0xfffff: a hole between 640K-1MB. These are reserved page frames • For some old devices using VESA Local bus • 0xe00000 to 0xffffff : 14MB-16MB • going out of production • For device connected to PCI bus • is mapped into very large physical address, well above the end of RAM’s physical address. Much simpler to handle • AGP (Accelerated Graphics Port) • use a special hardware circuit GART (Graphics Address Remapping Table) • GART enables AGP to sustain much higher data transfer rate.
Interrupts Revisited How interrupts happens. Connections between devices and interrupt controller actually use interrupt lines on the bus rather than dedicated wires
Principles of I/O SoftwareGoals of I/O Software (1) • Device independence • programs can access any I/O device • without specifying device in advance • (floppy, hard drive, or CD-ROM) • Uniform naming • name of a file or device a string or an integer • not depending on which machine • Error handling • handle as close to the hardware as possible
Goals of I/O Software (2) • Synchronous vs. asynchronous transfers • blocked transfers vs. interrupt-driven • Buffering • data coming off a device cannot be stored in final destination • Sharable vs. dedicated devices • disks are sharable • tape drives would not be
Interrupt-Driven I/O • Writing a string to the printer using interrupt-driven I/O • Code executed when print system call is made • Interrupt service procedure
I/O Using DMA • Printing a string using DMA • code executed when the print system call is made • interrupt service procedure
Interrupt Handlers (1) • Interrupt handlers are best hidden • have driver starting an I/O operation block until interrupt notifies of completion • Interrupt procedure does its task • then unblocks driver that started it • Steps must be performed in software after interrupt completed • Save regs not already saved by interrupt hardware • Set up context for interrupt service procedure
Interrupt Handlers (2) • Set up stack for interrupt service procedure • Ack interrupt controller, reenable interrupts • Copy registers from where saved • Run service procedure • Set up MMU context for process to run next • Load new process' registers • Start running the new process
Device Drivers • Logical position of device drivers is shown here • Communications between drivers and device controllers goes over the bus
Device-Independent I/O Software (3) (a) Unbuffered input (b) Buffering in user space (c) Buffering in the kernel followed by copying to user space (d) Double buffering in the kernel
Disk Hardware (7) • Cross section of a CD-R disk and laser • not to scale • Silver CD-ROM has similar structure • without dye layer • with pitted aluminum layer instead of gold
