netfpga informational tutorial n.
Download
Skip this Video
Loading SlideShow in 5 Seconds..
NetFPGA Informational Tutorial PowerPoint Presentation
Download Presentation
NetFPGA Informational Tutorial

play fullscreen
1 / 72

NetFPGA Informational Tutorial

384 Views Download Presentation
Download Presentation

NetFPGA Informational Tutorial

- - - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript

  1. Presented by: Adam Covington (Stanford University) Andrew W. Moore (University of Cambridge) Toronto, Canada August 19, 2011 http://NetFPGA.org NetFPGA InformationalTutorial

  2. Tutorial Outline Motivation Introduction The NetFPGA Platform Hardware Overview NetFPGA 1G NetFPGA 10G The Stanford Base Reference Router Motivation: Basic IP review Example: Reference Router running on the NetFPGA Community Contributions Altera-DE4 NetFPGA Reference Router (UMassAmherst) NetThreads (University of Toronto) Concluding Remarks

  3. Section I: Motivation

  4. NetFPGA = Networked FPGA A line-rate, flexible, open networking platform for teaching and research

  5. NetFPGA consists of… NetFPGA 1G Board Four elements: • NetFPGA board • Tools + reference designs • Contributed projects • Community NetFPGA 10G Board

  6. NetFPGA Board Comparison

  7. NetFPGA board PC with NetFPGA 1GE FPGA 1GE 1GE Memory 1GE NetFPGA Board NetworkingSoftware running on a standard PC CPU Memory PCI A hardware accelerator built with Field Programmable Gate Arraydriving Gigabit network links

  8. Running the Router KitUser-space development, 4x1GE line-rate forwarding OSPF BGP My Protocol user kernel Routing Table “Mirror” 1GE FPGA Fwding Table Packet Buffer 1GE 1GE 1GE 1GE IPv4 Router 1GE Memory 1GE 1GE Usage #1 CPU Memory PCI

  9. Enhancing Modular Reference Designs Verilog EDA Tools (Xilinx, Mentor, etc.) NetFPGA Driver • Design • Simulate • Synthesize • Download 1GE L3 Parse L2 Parse In Q Mgmt 1GE 1GE IP Lookup Out Q Mgmt 1GE Verilog modules interconnected by FIFO interfaces Usage #2 PW-OSPF CPU Memory Java GUI Front Panel (Extensible) PCI 1GE FPGA 1GE 1GE My Block Memory 1GE

  10. Creating new systems Verilog EDA Tools (Xilinx, Mentor, etc.) • Design • Simulate • Synthesize • Download NetFPGA Driver 1GE My Design (1GE MAC is soft/replaceable) 1GE 1GE 1GE Usage #3 CPU Memory PCI 1GE FPGA 1GE 1GE Memory 1GE

  11. Tools + Reference Designs 1G Tools: • Compile designs • Verify designs • Interact with hardware Reference designs: • Router (HW) • Switch (HW) • Network Interface Card (HW) • Router Kit (SW) • SCONE (SW)

  12. Contributed Projects More projects: http://netfpga.org/foswiki/NetFPGA/OneGig/ProjectTable

  13. Community Wiki • Documentation • User’s Guide • Developer’s Guide • Encourage users to contribute Forums • Support by users for users • Active community - 10s-100s of posts/week

  14. International Community Over 1,000 users, using 1,900 cards at 150 universities in 32 countries

  15. NetFPGA’s Defining Characteristics • Line-Rate • Processes back-to-back packets • Without dropping packets • At full rate of Gigabit Ethernet Links • Operating on packet headers • For switching, routing, and firewall rules • And packet payloads • For content processing and intrusion prevention • Open-source Hardware • Similar to open-source software • Full source code available • BSD-Style License • But harder, because • Hardware modules must meeting timing • Verilog & VHDL Components have more complex interfaces • Hardware designers need high confidence in specification of modules

  16. Test-Driven Design • Regression tests • Have repeatable results • Define the supported features • Provide clear expectation on functionality • Example: Internet Router • Drops packets with bad IP checksum • Performs Longest Prefix Matching on destination address • Forwards IPv4 packets of length 64-1500 bytes • Generates ICMP message for packets with TTL <= 1 • Defines how packets with IP options or non IPv4 … and dozens more … Every feature is defined by a regression test

  17. Who, How, Why Who uses the NetFPGA? • Teachers • Students • Researchers How do they use the NetFPGA? • To run the Router Kit • To build modular reference designs • IPv4 router • 4-port NIC • Ethernet switch, … Why do they use the NetFPGA? • To measure performance of Internet systems • To prototype new networking systems

  18. Section II: Hardware Overview

  19. NetFPGA-1G

  20. Xilinx Virtex II Pro 50 • 53,000 Logic Cells • Block RAMs • Embedded PowerPC

  21. Network and Memory • Gigabit Ethernet • 4 RJ45 Ports • Broadcom PHY • Memories • 4.5MB Static RAM • 64MB DDR2 Dynamic RAM

  22. Other IO • PCI • Memory Mapped Registers • DMA Packet Transferring • SATA • Board to Board communication

  23. NetFPGA-10G • A major upgrade • State-of-the-art technology

  24. Comparison

  25. 10 Gigabit Ethernet • 4 SFP+ Cages • AEL2005 PHY • 10G Support • Direct Attach Copper • 10GBASE-R Optical Fiber • 1G Support • 1000BASE-T Copper • 1000BASE-X Optical Fiber

  26. Others • QDRII-SRAM • 27MB • Storing routing tables, counters and statistics • RLDRAM-II • 288MB • Packet Buffering • PCI Express x8 • PC Interface • Expansion Slot

  27. Xilinx Virtex 5 TX240T • Optimized for ultra high-bandwidth applications • 48 GTX Transceivers • 4 hard Tri-mode Ethernet MACs • 1 hard PCI Express Endpoint

  28. Beyond Hardware • NetFPGA-10G Board • Xilinx EDK based IDE • Reference designs with ARM AXI4 • Software (embedded and PC) • Public Repository (GitHub) • Public Wiki (PBWorks) PBWorks, GitHub, User Community MicroBlaze SW PC SW Xilinx EDK Reference Designs AXI4 IPs

  29. NetFPGA-1G Cube Systems PCs assembled from parts Stanford University Cambridge University Pre-built systems available Accent Technology Inc. Details are in the Guide http://netfpga.org/static/guide.html

  30. Rackmount NetFPGA-1G Servers NetFPGA inserts in PCI or PCI-X slot 2U Server (Dell 2950) 1U Server (Accent Technology Inc.) Thanks: Brian Cashman for providing machine

  31. Stanford NetFPGA-1G Cluster • Statistics • Rack of 40 • 1U PCs with NetFPGAs • Managed • Power • Console • LANs • Provides 4*40=160 Gbps of full line-rate processing bandwidth

  32. Section III: Network review

  33. Internet Protocol (IP) Data to be transmitted: Data … IP packets: IP Hdr IP Hdr IP Hdr Data Data Data … Ethernet Frames: Eth Hdr Eth Hdr Eth Hdr IP Hdr IP Hdr IP Hdr Data Data Data

  34. Internet Protocol (IP) Data … 1 4 16 32 Ver HLen T.Service Total Packet Length Fragment ID Flags Fragment Offset IP Hdr Data 20 bytes TTL Protocol Header Checksum Source Address Destination Address Options (if any)

  35. Basic operation of an IP router D R3 R1 R4 D A B E R2 C R5 Destination Next Hop F D R3 E R3 F R5

  36. Basic operation of an IP router R3 R1 R4 D A B E R2 C R5 F

  37. Forwarding tables 32 bits wide → ~ 4 billion unique address IP address Naïve approach: One entry per address ~ 4 billion entries Improved approach: Group entries to reduce table size

  38. IP addresses as a line Your computer My computer Stanford Berkeley Asia North America 0 232-1 All IP addresses

  39. Longest Prefix Match (LPM) Universities Continents Planet To: Stanford Data • Matching entries: • Stanford • North America • Everywhere Most specific

  40. Longest Prefix Match (LPM) Universities Continents Planet To: Canada Data • Matching entries: • North America • Everywhere Most specific

  41. Implementing Longest Prefix Match Searching Most specific FOUND Least specific

  42. Basic components of an IP router Management & CLI Routing Protocols Software Control Plane Routing Table Data Plane per-packet processing Forwarding Table Switching Queuing Hardware

  43. IP router components in NetFPGA Linux SCONE Management & CLI Management & CLI Routing Protocols OR Software Routing Protocols Routing Table Routing Table Router Kit Output Port Lookup Input Arbiter Output Queues Hardware Forwarding Table Switching Queuing

  44. Section IV: Example I

  45. Operational IPv4 router Java GUI SCONE Management & CLI Control Plane Software Routing Protocols Routing Table Reference router Forwarding Table Switching Queuing Data Plane per-packet processing Hardware

  46. Streaming video

  47. Streaming video NetFPGA running reference router PC & NetFPGA (NetFPGA in PC)

  48. Streaming video Video streaming over shortest path Video client Video server

  49. Streaming video Video client Video server

  50. Observing the routing tables • Columns: • Subnet address • Subnet mask • Next hop IP • Output ports