Case Studies of Compilers and Future Trends Chapter 21

1. Case Studies of Compilers and Future Trends Chapter 21 Mooly Sagiv

2. Goals • Learn on exiting compilers • Which of the studied subjects implemented • Mention techniques not studied • Future trends (textbook) • Other trends • Techniques used in optimizing compilers • Have some fun

3. Compilers Studied • SUN compilers for SPARC 8, 9 • IBM XL compilers for Power and PoewerPC architectures • Digital compiler for Alpha • Intel reference compiler for 386 • Comparison criteria • Duration and history • Structure • Optimizations performed on two programs

4. int length, width, radius; enum figure {RECTANGLE, CIRCLE} ; main() { int area=0, volume=0; height; enum figure kind=RECTANGLE; for (height=0; height < 10; height++) {if (kind == RECTANGLE) { area += length * width; volume += length * width * height; } else if (kind==CIRCLE){ area += 3.14 * radius * radius ; volume += 3.14 * radius * height; } } process(area, volume); }

5. integer a(500, 500), k, l; do 20 k=1,500 do 20 l=1,500 a(k, l)= k+l 20 continue call s1(a, 500) end subroutine s1(a,n) integer a(500, 500), n do 100 i = 1 1,n do 100 j = i + 1, n do 100 k = 1, n l = a(k, i) m = a(k, j) a(k, j) = l + m 100 continue end

6. The SPARC Architecture • Sparc 8 • 32 bit RISC superscalar system with pipeline • integer and floating point units • 8 general purpose integer registers (r00) • load, store, arithmetic, shift, branch, call and system control • addresses (register+register, register+displ.) • Three address instructions • Several 24 register windows (spilling by OS) • Sparc 9 • 64 bit architecture (upward compatible)

7. Front-ends for C, C++, Fortran 77, Pascal Originated from Berkeley 4.2 BSD Unix Developed at Sun since 1982 Original backend for Motorola 68010 Migrated to M6800 and then to SPARC Global optimization developed at 1984 Interprocedural optimization began at 1984 Mixed compiler model The Sun SPARC Compilers

8. The Sun SPARC Compiler Front-End Sun IR Automatic inliner aliaser iropt (global optimizer) yabe Sun IR Relocatable Code generator Relocatable

9. ENTRY “s1_” {IS_EXT_ENTRY, ENTRY_IS_GLOBAL} goto LAB_32 LAB_32: LTEMP.1 = (.n { ACCESS V41} ); i = 1 CBRANCH (i <= LTEMP.1, 1: LAB_36, 0: LAB_35); LAB_36: LTEMP.2 = (.n { ACCESS V41} ); j=i+1 CBRANCH (j <= LTEMP.2, 1: LAB_41, 0: LAB_40); LAB_41: LTEMP.3 = (.n { ACCESS V41} ); k=1 CBRANCH (k <= LTEMP.3, 1: LAB_46, 0: LAB_45); LAB_46: l = (.a[k, i] ACCESS V20} ); m = (.a[k, j] ACCESS V20}); *(a[k,j] = l+m {ACCESS V20, INT}); LAB_34: k = k+1; CBRANCH(k>LEMP.3, 1: LAB_45, 0: LAB_46); LAB_45: j=j+1 … LAB_35:

10. SUNOptimization Levels • O1 Limited optimizations • O2 • Optimize expressions not involving global, aliased local, and volatile variables • O3 Worst case assumptions on pointer aliases • Automatic inlining • software pipelining • loop unrolling • instruction scheduling • O4 Front-end provides aliases

11. iropt • Processes each procedure separately • Use basic blocks • Control flow analysis using dominators • Parallelizer uses structural analysis • Other optimizations using iterative algorithms • Optimizations translate Sun-IR  Sun-IR

12. Optimizations in iropt • Scalar replacement of aggregates and expansion of Fortran arithmetic on complex numbers • dependence-based analysis and transformations (O3, O4) • linearization of array addresses • algebraic simplification and reassociation of address expressions • loop invariant code motion • strength reduction and induction variable removal • global common-subexpression elimination • dead-code elimination

13. Dependence Based Analysis • Constant propagation • dead-code elimination • structural control flow analysis • loop discovery (index variables, lower and upper bounds) • segregation of loops that have calls and early exists • dependence analysis using GCD • loop distribution (split loops 20) • loop interchange • loop fusion • scalar replacement of array elements • recognition of reductions • data-cache tiling • profitability analysis for parallel code generation

14. Code Generator • First translate Sun-IR to asm+ • instruction selection • inline of assembly language templates • local optimizations (dead-code elimination, branch chaining, …) • macro expansion • data-flow analysis of live variables • early instruction selection • register allocation by graph coloring • stack frame layout • macro expansion (MAX, MIN, MOV) • late instruction scheduling • inline of assembly language constructs • macro expansion • emission of relocatable code

15. Optimizations on main • Removal of unreachable code in else (except ) • Move of loop invariant “length*width” • Strength reduction of “height” • Loop unrolling by factor of four • Local variables in registers • All computations in registers • Identifying tail call • Stack frame eliminated

16. Missed optimizations on main • Removal of  computations • Compute area in one instruction • Completely unroll the loop

17. Optimizations on Fortran example • Procedure integration of s1 (n=500) • Common subexpression elimination of “a[k,j]” • Loop unrolling • Local variables in registers • Software pipelining

18. Optimizations missed Fortran example • Eliminating s1 • Eliminating addition in loop via linear function test replacement

19. POWER/PowerPC Architecture • Power • 32 bit RISC superscalar system with • branch, integer and floating point units • optional multiprocessors (one branch) • 32 (shared) general purpose integer registers (gr00) • load, store, arithmetic, shift, branch, call and system control • addresses (register+register, register+displ.) • Three address instructions • PowerPC • Both 32 and 64 bit architecture

20. Front-ends for PL.8, C, C++, Fortran 77, Pascal Originated in 1983 Written in PL.8 First released for PC/RT Generates code for Power, Intel 386, SPARC and PowerPC No interprocedural optimizations (Almost) all optimizations on low level IR (XIR) The IBM XL Compilers

21. The IBM/XIL Compiler Translator XIL Optimizer XIL Instruction scheduler Register allocation Instruction scheduler XIL Instruction Selection XIL Final assembly Relocatable

22. TOBEY • Processes each procedure separately • Use basic blocks • Control flow analysis in using DFS and intervals • YIL a higher level representation • loops • SSA form • Data-flow analysis by interval analysis • Iterative algorithm for non reducible

23. Optimizations in TOBEY • Switches  Compare|Table branch • Mapping local variables to register+offset • Inline for current module • Aggressive value numbering • global common subexpression elimination • loop-invariant code motion • downward store motion • dead-store motion • reassociation, strength reduction • global constant propagation • architecture specific optimizations (MAX) • value numbering • global common subexpression elimination • dead code elimination • elimination of dead induction variables

24. Final Assembly • Two passes on XIL • Peephole optimizations • Generate relocatable immage

25. Optimizations on main • Removal of unreachable code in else • Move of loop invariant “length*width” • Strength reduction of “height” • Loop unrolling by factor of two • Local variables in registers • All computations in registers

26. Missed optimizations on main • Identifying tail call • Compute area in one instruction

27. Optimizations on Fortran example • n=500 • Common subexpression elimination of “a[k,j]” • Loop unrolling 9 • Local variables in registers • Software pipelining

28. Optimizations missed Fortran example • Procedure integration of s1 • Eliminating addition in loop via linear function test replacement

29. Intel 386 Architecture • 32 bit CISC system • 8 32 bit integer registers • Support 16 and 8 bit registers • Dedicated registers (e.g., stack frame) • Many address modes • Two address instructions • 80 bits floating point

30. Front-ends for C, C++, Fortran 77, Fortran 90 Front-End from Multiflow and Edison Design Group (EDG) Generates 386 code Interprocedural optimization were added (1991) Mixed optimization mode Many optimizations based on partial redundency elimination The Intel Compilers

31. The Intel Compiler Front-End IL-1 Interprocedural Optimizer IL-1+IL-2 Memory optimizer IL-1+IL-2 Global optimizer IL-1+IL-2 Code selector Register allocation Instruction scheduler Relocatable

32. Interprocedural Optimizer • Cross module • Saves intermediate representations • Interprocedural constant propagation

33. Memory Optimizer • Improves memory and caches • loop transformations • Uses SSA form • Data dependence

34. Global Optimizer • Constant propagation • dead code elimination • local common subexpression elimination • copy propagation • partial redundency elimination • copy propagation • dead code elimination

35. Optimizations on main • Removal of unreachable code in else • Move of loop invariant “length*width” • Strength reduction of “height” • Local variables in registers

36. Missed optimizations on main • Compute area in one instruction • Identifying tail call • Loop unrolling

37. Optimizations on Fortran example • Inlinining s1 n=500 • Common subexpression elimination of “a[k,j]” • Local variables in registers • Linear function test replacement

38. Optimizations missed Fortran example • Eliminating s1 • Loop unrolling in the inlined loop

41. Future Trends in Compiler Design and Implementation • SSA is being used more and more: • generalizes basic block optimizations to extended basic blocks • leads to performance improvements • Partial redundency elimination is being used more • Partial redundency and SSA are being combined • Paralizations and vectorization are being integrated into production compilers • Data-dependence testing, data-cache optimization and software pipeline will advance significantly • The most active research area in scalar compilation will be optimization

42. Other Trends • More and more work will be shifted from hardware to compilers • More advanced hardware will be available • Higher order programming languages will be used • Memory management will be simpler • Modularity facilities • Assembly programming will hardly be used • Dynamic (runtime) compilation will become more significant

43. Theoretical Techniques in Compilers