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GRIP – Gigabit Rate IPsec

GRIP – Gigabit Rate IPsec. University of Southern California Information Sciences Institute – East 3811 N. Fairfax Dr., Ste 200 Arlington, VA 22203. Contact Information:. Peter Bellows pbellows@east.isi.edu (703) 751-3701. Jarda Flidr jflidr@east.isi.edu (703) 751-3710.

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GRIP – Gigabit Rate IPsec

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  1. GRIP – Gigabit Rate IPsec University of Southern CaliforniaInformation Sciences Institute – East3811 N. Fairfax Dr., Ste 200Arlington, VA 22203 Contact Information: Peter Bellowspbellows@east.isi.edu(703) 751-3701 Jarda Flidrjflidr@east.isi.edu(703) 751-3710 Tom Lehmantlehman@east.isi.edu(703) 751-3736 Brian Schottbschott@east.isi.edu(703) 751-3722

  2. IPSec compliant ≥ gigabit rate crypto processing/transforms development of innovative parallelized, pipelined architecture for IP packets processing COTS workstation and a PCI based hardware accelerator with a GbE network interface highly-adaptive, reconfigurable platform for conducting future research of high-speed IPSec or general cryptographic accelerators GRIP Accelerator – 1st Generation Gigabit Rate Ipsec - research project enabling end-to-end secure, authenticated communications at gigabit data rates XMACII (Vitesse) GRIP mezzanine board Transceiver Virtex 300 (Xilinx)

  3. 66/64 PCI Board – SLAAC1V SLAAC1V board Mezzanine Connector (GRIP plugs in here) Virtex 1000 FPGA (Xilinx)

  4. Architecture overview Linux kernel 2.4.x Modified FreeS/WAN IP IPsec stack Encryptor Cores (Virtex 1000 FPGA) GRIP driver Ethernet 66/64 PCI X1 Slaac1v Board GRIP mezzanine Board X0 XMACII GbE controller X2 PCI/GRIP controller (Virtex 1000 FPGA)

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