Assembly and Packaging Key Changes for 2011 Challenges and Solutions to meet Market Requirements

1. Assembly and PackagingKey Changes for 2011Challenges and Solutions to meet Market Requirements

2. The evolution of Packaging “DNA”Tools to enable and implement new products • Co-design, modeling and simulation (electrical, thermal and mechanical) • Optimization of materials and processes in the computer for new products (save time and cost) • New device/package/component architectures • Interposers • 3D structures (thinning, bonding) • Embedded components • Photonics • New materials and supply infrastructure • Stress management • Thermal management • Interfacial adhesion • Cost reduction • New equipment to meet changing requirements

3. Integration Challenges µBump, 2.5D 3D Optoelectronics RF Harsh environment Complex Interaction ULK Pb Free C4 Coreless, Thin core, MCM 2011+ 2010

4. Co-Design, Modeling and Simulation Tools Needed

5. The evolution of Packaging “DNA”Tools to enable and implement new products • Co-design, modeling and simulation (electrical, thermal and mechanical) • Optimization of materials and processes in the computer for new products (save time and cost) • New device/package/component architectures • Interposers • 3D structures (thinning, bonding) • Embedded components • Photonics • New materials and supply infrastructure • Stress management • Thermal management • Interfacial adhesion • Cost reduction • New equipment to meet changing requirements

6. Expanded Coverage of Emerging Requirements for 2011:Interposers • Selected Issues for Interposers: • Systems integration for 2D and 3D • Interposer features • Redistribution wiring • Passive networks • Thermal management • Stress management • Materials selection • Si • Ceramic • Glass • Organics

7. Assembly and PackagingMajor Trends • 3D Integration • New Packaging Architectures • Wafer level • System in package • Increased bandwidth density requirements • Power issues: • Total power used for information technology • Battery live for mobile products • Power integrity (particularly for 3D stacked architecture)

8. 3D TSV Die stacking Al I/O pad Si 5um “Super-Contact” Si SiO2 SiO2 Si M1 Al Top wafer M2 Al M3 Al 8.4um SiO2 Bottom wafer M4 Al M5 Al M6 Cu M6 Cu M5 Al Wafer-to-wafer misalign ~0.4um CPU – SRAM 3rd wafer 2nd wafer 1st wafer: controller Dielectric(SiO2/SiN) Gate Poly STI (Shallow Trench Isolation) W (Tungsten contact & via) Al (M1 – M5) Cu (M6, Top Metal)

9. Assembly and PackagingMajor Trends • 3D Integration • New Packaging Architectures • Wafer level • System in package • Increased bandwidth density requirements • Power issues: • Total power used for information technology • Battery live for mobile products • Power integrity (particularly for 3D stacked architecture)

10. Wafer Level CSP

11. Assembly and PackagingMajor Trends • 3D Integration • New Packaging Architectures • Wafer level • System in package • Increased bandwidth density requirements • Power issues: • Total power used for information technology • Battery live for mobile products • Power integrity (particularly for 3D stacked architecture)

12. Assembly and PackagingMajor Challenges • Testing and Test access • 3D structures for thinned die • Test cost for 100B transistors • Thermal management • Hot spots • Increased thermal density of 3D • Total thermal density • New Production Equipment for emerging architectures • New Materials • Pb free solder, Cu wire bonds, Cu pillars • New underfill • New mold compounds • New interfacial adhesion materials

13. Bond Pad Open is 43um, 0.8mil (20um) Cu wire

14. Assembly and PackagingMajor Challenges • Testing and Test access • 3D structures for thinned die • Test cost for 100B transistors • Thermal management • Hot spots • Increased thermal density of 3D • Total thermal density • New Production Equipment for emerging architectures • New Materials • Pb free solder, Cu wire bonds, Cu pillars • New underfill • New mold compounds • New interfacial adhesion materials

15. Assembly and PackagingNew Tables for 2011

16. Interposer Example: Xilinx Stacked Si FPGA • More than 10,000 routing connections • Compared with standard I/O connections it provides: • > 100X die-to-die bandwidth per watt • one-fifth the latency

17. Assembly and PackagingNew Tables for 2011

18. Photonic Packaging has diverse requirements High Bandwidth fiber optic transceiver Wafer Scale Camera Modules Vision for 2020 – photonic data to the chip

19. Assembly and PackagingNew Tables for 2011

20. Advanced Production Equipment Needs • 450mm wafer handling/processing • Printed metallization equipment • Wafer handling for thinned die • Carrier processes • Mechanical handling of carrier mounted die in production equipment • Foup replacement for thinned wafers on carriers • 3D inspection equipment • Singulation equipment (include stacked die and WLP) • with high accuracy for very small die • narrow streets

21. Advanced Equipment for 3D and WLPContinued • Alignment accuracy • Bonding equipment (D-D, W-W, D-W) Includes: • Permanent and temporary bonding • Thermal compression bonding • Direct interconnect bonding • High topography bonding (thick and not coplanar due to variable die/stack thickness) • Both permanent and temporary

22. Expanded Coverage of Emerging Requirements for 2011:Medical Electronics • Medical electronics Categories to be addressed: • Portable medical electronics • Implantable medical electronics (Parkinson’s disease symptom control) • Selected Issues for Medical electronics • Power requirements: energy scavenging; wireless radiated power; batteries • Safety issues (voltage, biocompatibility, power delivery) • FDA certification • Reliability requirements • Environmental issues • Connectivity (wireless) • Optical components (cameras) • Microfluidics • Implantable micro-robotics • Sensors • MEMS

23. Expanded Coverage of Emerging Requirements for 2011:Automotive Electronics • Automotive electronics Categories to be addressed: • Internal combustion • Hybrid • All electric • Selected Issues • Communications (including optical networks) • Thermal management • In cabin • Hostile environments • Safety • Sensors • Controls for improved efficiency • Cost One side air cooling Cooling on both sides Liquid immersion cooling

24. Expanded Coverage of Emerging Requirements for 2011:Embedded Components • Embedded Component Categories to be addressed: • Active devices • Passive devices • Selected Issues for Embedded Components • Performance enhancement due to reduced distance between die and passives • Incorporation of additional functionality (heat pipes; wave guides) • Keep out area around embedded components • Charge source close to the die for current surge • Reduced size by placement of passives under die • Placement accuracy for small thinned die • 3D alignment tolerance for assembly • Improved resistance to shock • Thermal management

25. Assembly and PackagingCross Technical Working Group Projects • ERM • Define new materials solutions for changing thermal, electrical and mechanical requirements • Interconnect • Identification of difficult challenges and potential solutions at the interface of the wafer fab and packaging activity for 3D integration • Design • Co-design tools for 3D SiP products • Yield • Developing yield optimization for Assembly and packaging

26. Assembly and PackagingCross Technical Working Group Projects • Modeling • Modeling and simulation for thermal, electrical and mechanical properties to enable product prototype optimization in the computer • Test • Test solutions to meet the challenges of 3D architecture • RFAMS • Embedded passive components for RF applications

27. Thank You for your Attention