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This document explores the LC-3 data path, a key component of the Von Neumann architecture. It details the role of the global bus, memory, ALU, register file, and control unit in processing data. The global bus carries a 16-bit signal to various components, with tri-state devices allowing only one signal at a time. It also describes how the control unit orchestrates the flow of information and the interaction between registers and memory. Moreover, it covers the functionalities of components like the Program Counter (PC), MAR, and condition code logic in the instruction processing cycle.
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Computer Science 210Computer Organization A Data Path for von Neumann Processing
LC-3 Data Path Revisited Filled arrow = info to be processed Unfilled arrow = control signal
Data Path Components: Global Bus • Global bus • Carries 16-bit signal to many components • Inputs are tri-state devices, only signal when enabled • One signal is enabled at any time • Control unit decides which one • Any component can read from the bus • A register only captures data if write-enabled by the control unit
Data Path Components: Memory • Memory • Control and data registers for memory and I/O devices • MAR, MDR, control signal for read/write
LC-3 Data Path Revisited Filled arrow = info to be processed Unfilled arrow = control signal
Data Path Components: ALU • ALU • Accepts inputs from register file and sign-extended data from IR (immediate field) • Output goes to the bus • Output is used by condition code logic, register file, memory
LC-3 Data Path Revisited Filled arrow = info to be processed Unfilled arrow = control signal
Data Path Components: Register File • Register file • Two read addresses (Src1 and Src2) and one write address (Dst) • One input (actually a write) from the bus, the result of ALU operation or memory read • Two outputs (actually reads), used by ALU, PC, memory address • Data for store instructions passes through ALU
LC-3 Data Path Revisited Filled arrow = info to be processed Unfilled arrow = control signal
Data Path Components: PC and PCMUX • PC and PCMUX • Three inputs into PCMUX, output to PC • PC + 1 (fetch) • Address adder (BR, JMP) • Bus (TRAP)
LC-3 Data Path Revisited Filled arrow = info to be processed Unfilled arrow = control signal
Data Path Components: MAR and MARMUX • MAR and MARMUX • Two inputs into MARMUX, output to MAR • Address adder – LD/ST, LDR/STR • Zero-extended IR[7:0] – (TRAP)
LC-3 Data Path Revisited Filled arrow = info to be processed Unfilled arrow = control signal
Data Path Components: Logic • Condition code logic • Looks at value on the bus and generates N, Z, and P signals • Registers set only when control unit enables them, after ADD, AND, NOT, LD, LDI, LDR, LEA
LC-3 Data Path Revisited Filled arrow = info to be processed Unfilled arrow = control signal
Data Path Components: Control Unit • Control unit is an FSM • On each machine cycle, changes control signals for next phase of instruction processing • Who drives the bus? • Which registers are enabled? • Which operation should the ALU perform? • Logic decoder for the opcode, etc.