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This overview delves into finite state machines (FSMs), a crucial concept in computer organization and sequential circuits. FSMs consist of a finite number of states, inputs, outputs, and state transitions, allowing systems to remember their states and respond to inputs accordingly. We explore combinational logic and storage elements, exemplifying their roles in circuits like locks and traffic lights. Additionally, the master-slave flip-flop is introduced as a solution for maintaining state while avoiding circular dependencies. Learn how these components interact to shape digital logic design.
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Computer Science 210Computer Organization Sequential Circuits Finite State Machines
State Machine • A type of sequential circuit • Combinational logic + storage • Remembers state • Changes output and state based in inputs and current state State Machine Inputs Outputs Combinational Logic Circuit Storage Elements
4 1 8 4 30 25 5 20 10 15 Combinational or Sequential? Combinational Success depends only onthe values, not the order in which they are set. Sequential Success depends onthe sequence of values (e.g, R-13, L-22, R-3).
30 25 5 20 10 15 States of Sequential Lock Our lock example has four different states,labeled A-D:A: The lock is not open, and no relevant operations have been performed. B: The lock is not open, and the user has completed the R-13 operation. C: The lock is not open, and the user has completed R-13, followed by L-22. D: The lock is open. R-13, L-22, R-3
30 25 5 20 10 15 State Diagram R-13, L-22, R-3 Shows states and actions that cause transitions between states
Finite State Machine (FSM) • A finite number of states • A finite number of inputs • A finite number of outputs • A finite number of state transitions • Actions that specify output values
The Clock “1” “0” One Cycle time The clock cycle triggers a transition between states
Problem • Memory circuits (latches) maintain the states • Current state must be sent from latch to a combinational circuit, which uses it to compute the next state • Next state is fed back as input to latch • Isn’t this circular?
Solution: Master/Slave Flipflop A pair of gated D-latches, to isolate next state from current state. During 1st phase (clock=1),previously-computed statebecomes current state and issent to the logic circuit. During 2nd phase (clock=0),next state, computed bylogic circuit, is stored inLatch A.
Storage • Each flipflop stores one state bit • Number of flipflops is determined by number of states • Sequential lock had four states, so two bits
Blinking Traffic Sign • A blinking traffic sign • No lights on • 1 & 2 on • 1, 2, 3, & 4 on • 1, 2, 3, 4, & 5 on • (repeat as long as switchis turned on) 3 4 1 5 2 DANGERMOVERIGHT
Traffic Light State Diagram Switch on Switch off State bit S1 State bit S0 Outputs Transition on each clock cycle.
Truth Tables Outputs (depend only on state: S1S0) Next State: S1’S0’(depend on state and input) Switch Lights 1 and 2 Lights 3 and 4 Light 5 Whenever In=0, next state is 00.
Traffic Light Circuit Master-slaveflipflop