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Pipelining Principles

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  1. Prof. Sirer CS 316 Cornell University Pipelining Principles

  2. Meet the Cast • Alice

  3. Meet the Cast • Alice • Bob

  4. Meet the Cast • Alice • Bob • They don’t like each other!

  5. The Laundry • Four sequential tasks

  6. Laundry Room Design #1 • A large room with a one entry-door and one exit-door

  7. Laundry Room Design #1 • First Alice owns the room

  8. Laundry Room Design #1 • First Alice owns the room • Bob can enter as soon as she is done • No possibility for Alice and Bob to fight

  9. Laundry Room Design #1 • Elapsed Time for Alice: 4 • Elapsed Time for Bob: 4 • Elapsed Time for both: 8 • A better laundry room can improve utilization and speed up task completion Time

  10. Laundry Room Design #2 • Elapsed Time for Alice: 4 • Elapsed Time for Bob: 4 • Elapsed Time for both: 5!!! Time

  11. Laundry Room Design #2 • The room is partitioned into stages • One person owns a stage at a time, the room can hold up to four people simultaneously

  12. Laundry Room Design #2 Alice

  13. Laundry Room Design #2 Bob Alice

  14. Laundry Room Design #2 Charlie Bob Alice

  15. Laundry Room Design #2 Dave Charlie Bob Alice

  16. Implications • Principle: Latencies can be masked by running isolated operations in parallel • Need mechanisms for isolation • Need mechanisms for handling dependencies between tasks • Let’s apply this principle to processor design…

  17. MIPS Processor • Functional decomposition of our processor

  18. A MIPS Pipeline • Pipeline stages for a MIPS processor

  19. Pipeline Isolation • Latches between pipeline stages hold the values for the stage to operate on • Latches and register file are triggered on opposite edges of the clock

  20. Pipeline Logic • Additional latches required to store the instruction for each pipeline stage • Copy the instruction forward, generate local control signals separately in each pipeline stage

  21. Pipelining for Other Circuits • Pipelining can be applied to any combinational logic circuit • What’s the circuit latency at 2ns. per gate? • What’s the throughput? • What is the stage breakdown? Where would you place latches? • What’s the throughput after pipelining? • Pipelining vs. superpipelining

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