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Bruce Mayer, PE Registered Electrical & Mechanical Engineer BMayer@ChabotCollege.edu

Engineering 43. Diodes-2. Bruce Mayer, PE Registered Electrical & Mechanical Engineer BMayer@ChabotCollege.edu. Learning Goals. Understand the Basic Physics of Semiconductor PN Junctions which form most Diode Devices Sketch the IV Characteristics of Typical PN Junction Diodes

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Bruce Mayer, PE Registered Electrical & Mechanical Engineer BMayer@ChabotCollege.edu

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  1. Engineering 43 Diodes-2 Bruce Mayer, PE Registered Electrical & Mechanical EngineerBMayer@ChabotCollege.edu

  2. Learning Goals • Understand the Basic Physics of Semiconductor PN Junctions which form most Diode Devices • Sketch the IV Characteristics of Typical PN Junction Diodes • Use the Graphical LOAD-LINE method to determine the “Operating Point” of Nonlinear (includes Diodes) Circuits

  3. Learning Goals • Analyze diode-containing Voltage-Regulation Circuits • Use various math models for Diode operation to solve for Diode-containing Circuit Voltages and/or Currents • Learn The difference between LARGE-signal and SMALL-Signal Circuit Models IDEAL and PieceWise-Linear Models

  4. Diode Models • LoadLine Analysis works well when the ckt connected to a SINGLE Diode can be “Thevenized” • However, for NONLinearckts, such as those containing multiple diodes, construction of the LOAD-Curve Eqn may be difficult, or even impossible. • Many such ckts can be analyzed by Idealizing the diode

  5. Consider an Electrical Diode → I V REALBehavior IDEALModel OFFSETModel LINEARModel Diode Models • We can MODEL the V-I Behavior of this Device in Several ways

  6. Ideal Model (Ideal Rectifier) Diode ON Diode OFF • Analyze Ckts containing Ideal Diodes • Assume (or Guess) a “state” for each diode. Ideal Diodes have Two states • ON → a SHORT Ckt when Fwd Biased • OFF →an OPEN Ckt if Reverse Biased • Check the Assumed Opens & Shorts • Should have Current thru the SHORTS • Should have ∆V across the OPENS

  7. Ideal Model (Ideal Rectifier) Diode ON Diode OFF • Check to see if guesses for i-flow, ∆V, and BIAS-State are consistent with the Ideal-Diode Model • If i-flow, ∆V, and bias-V are consistent with the ideal model, then We’re DONE. • If we arrive at even a SINGLE Inconsistency, then START OVER at step-1

  8. Example  Ideal Diode • Find For Ckt Below find: • Use theIdealDiodeModel

  9. Example  Ideal Diode • Assume BOTH Diodes are ON or Conducting • In this Case VD1 = VD2 = 0 • Thus D2 Anode is connected to GND • Then Find by Ohm • Next use KCL at Node-A (in = out)

  10. Example  Ideal Diode • Using ID2 = 1 mA • Thus • Now must Check that both Diodes are indeed conducting • From the analysis • Thus the current thru both Diodes is positive which is consistent with the assumption 

  11. Example  Ideal Diode • Since both Diodes conduct the Top of Vo is connected to GND thru D2 & D1 • Another way to think about this is that since VD2 = 0 and VD1 = 0 (by Short Assumption) Find Vo = GND+VD2+VD1 = GND + 0 + 0 = 0 • Thus the Answer

  12. Example  Ideal Diode • Find For Ckt Below find: • Use theIdealDiodeModel • Note thedifferentvalues onR1 & R2 • Swapped

  13. Example  Ideal Diode • Again Assume BOTH Diodes are ON, or Conducting • As Before VD1 = VD2 = 0 • Again VB shorted to GND thru D1 • Then Find by Ohm • Now use KCL at Node-B (in = out)

  14. Example  Ideal Diode • Using ID2 = 1.01 mA • Thus • Now must Check that both Diodes are indeed conducting • From the analysis • We find and INCONSISTENCY and our Assumption is WRONG 

  15. Example  Ideal Diode • Must Iterate • Assume • D1 → OFFD2 → ON • In this Case D1 is an OPEN → ID1 =0 • Current ID2 must flow thru BOTH Resistors • Then Find by Ohm

  16. Example  Ideal Diode • Must Check that D1 is REVERSE Biased as it is assumed OFF • By KVL & Ohm • Thus D1 is INDEED Reverse-Biased, Thus the Ckt operation is Consistent with our Assumption 

  17. Example  Ideal Diode • Calculate Vo by noting that: • D2 is ON → VD2 = 0D1 is OFF → Current can only flow thru D2 • In this case Vo = VB • By the Previous Calculation, Find

  18. Offset & Linear Models • The Offset Model • Better than Ideal, but no account of Forward-Slope • The Linear Model • The model eqn: • Yet moreaccurate, but also does not account for Rev-Bias Brk-Down

  19. Point Slope Line Eqn • When constructing multipiece-wise linear models, the Point-Slope Equation is extremely Useful • Where • (x1, y1) & (x2, y2) are KNOWN Points • Example: Find Eqn for line-segment: (3,17) (19,5)

  20. Point Slope Line Eqn • Using the 2nd Point • Can easily convert to y = mx+b • Multiply by m, move −5 to other side of = (3,17) (19,5)

  21. Slopes on vi Curve • With Reference to the Point-Slope eqnv takes over for x, and i takes over for y • The Slope on a vi Curve is a conductance • If the curve is NONlinear then the local conductance is the first Derivative • Recall the Op-Pt is also the Q-Pt

  22. Slopes on vi Curve • Finally recall that conductance & resistance are Inverses • Example: Find the RESISTANCE of the device associated with the VI curve that follows

  23. Slopes on vi Curve • Since R = 1/G Find the Device Resistance as • For a NONlinear vi curve the local slope then: r = 1/g • The General Reln

  24. Example PieceWise Linear Model • Construct a PieceWise Linear Model for the Zener vi curve shown at Right

  25. PieceWise Linear Zener • m for Segment A • Us Pt-Slpeqn with (0.6V,0mA) for Pt-1 • Segment- B is easy

  26. PieceWise Linear Zener • m for Segment C • Us Pt-Slpeqn with (−6V,0mA) for Pt-1 • Thus the PieceWise Model for the Zener

  27. Example PieceWise Linear Model • Alternatively in terms of Resistances • ADVICE: remember the Pt-Slope Line-Eqn

  28. Half-Wave Rectifier Ckt • Consider an Sinusoidal V-Source, such as an AC socket in your house, supplying power to a Load thru a Diode Power Input Load Voltage

  29. HalfWave Rectifier • Note that the Doide is FWD-Biased during only the POSITIVE half-cycle of the Source • Using this simple ckt provides to the load ONLY positive-V; a good thing sometimes • However, the positive voltage comes in nasty PULSES which are not well tolerated by positive-V needing loads

  30. Smoothed HalfWave Rectifier • Adding a Cap to the Circuit creates a Smoothing effect • In this case the Diode Conducts ONLY when vs>vC and vC=vL • This produces vL(t) and iL(t) curves • Note that iL(t) is approx. constant

  31. Smoothed HalfWave Rectifier • The change in Voltage across the Cap is called “Ripple” • Often times the load has a Ripple “Limit” from which we determine Cap size • From the iL(t) curve on the previous slide note: • Cap Discharges for Almost the ENTIRE Cycle time, T (diode Off) • The Load Current is approx. constant, IL • Recall from EARLY in the Class Ripple

  32. Smoothed HalfWave Rectifier • Also from Cap Physics (chp3) • In the Smoother Ckt the Cap charges during the “Ripple” portion of the curve • Equating the Charge & Discharge “Q’s find • Note that both these equations are Approximate, but they are still useful for initial Ckt Design • Solving the equations for the Cap Value needed for a given Vr Charge Discharge

  33. Smoothed HalfWave Rectifier • Find the Approximate Average Load Voltage VL,hi VL,lo

  34. Capacitor-Size Effect • Any load will discharge the capacitor. In this case, the output will depend on how the RC time constant compares with the period of the input signal. • The plots at right consider the various cases for the simple circuit above with a 1kHz, 5V sinusoidal input

  35. Full Wave Rectifier • The half-wave ckt will take an AC-Voltage and convert it to DC, but the rectified signal has gaps in it. • The gaps can be eliminated thru the use of a Full-Wave rectifier ckt • The Diodes are • Face-to-Face (right) • Butt-to-Butt (left) • Thisrectifiedoutput hasNO Gaps

  36. Full Wave Rectifier Operation D1 Supplies V to Load D4 Supplies V to Load

  37. Full Wave Rectifier Smoothing • The Ripple on the FULL wave Ckt is about 50% of that for the half-wave ckt • Since the Cap DIScharges only a half-period compared to the half-wave ckt, the size of the “smoothing” cap is then also halved:

  38. Small Signal Models • Often we use NonLinear Circuits to Amplify, or otherwise modify, non-steady Signals such as ac-sinusoids that are small compared to the DC Operating Point, or Q-Point of the Circuit. • Over a small v or i range even NonLinear devices appear linear. This allows us to construct a so-called small signal Linear Model

  39. Small Signal Analysis • Small signal Analysis is usually done in Two Parts: • Large-Signal DC Operating Point (Q-Pt) • Linearize about the Q-Pt using calculus • Recall from Calculus • This approximation become more accrate as ∆y & ∆x become smaller

  40. Small Signal Analsyis • Now let y→iD, and x→ vD • Use a DC power Supply to set the operating point on the diode curve as shown at right • This could be done using LoadLine methods • From Calculus • Next Take derivative about the Q-Pt

  41. Small Signal Analysis • About Q-Pt • Now if we have a math model for the vi curve, and we inject ON TOP of VDQ a small signal, ∆vD find • The derivative is the diode small-signal Conductance at Q

  42. Small Signal Analysis • In the large signal Case: R = 1/G • By analogy In the small signal case: • r = 1/g • Also since small signal analysis is associated with small amounts that change with time… • Define the Diode’s DYNAMIC, small-signal Conductance and Resistance

  43. Small Signal Analysis • Note Units for rd • Recall the approximation for iD • Change Notation for Small Signal conditions • Find rd for a “Shockley” Diode in majority FWD-Bias • Recall Shockley Eqn • Then the Large-signal Operating Point at vD = VDQ

  44. Small Signal Analysis • Taking the derivative of the ShockelyEqn • Recall from last sld • Sub this Reln into the Derivative Eqn • Recall • Subbing for diD/dvD

  45. Notation: Large, Small, Total • VDQ and IDQ are the LARGE Signal operating point (Q-Pt) DC quantities • These are STEADY-STATE values • vD and iD are the TOTAL and INSTANTANEQOUS quantities • These values are not necessarily steady-state. To emphasize this we can write vD(t) and iD(t)

  46. Notation: Large, Small, Total • vd and id are the SMALL, AC quantities • These values are not necessarily steady-state. To emphasize this we can write vd(t) and id(t) • AnExamplefor DiodeCurrentnotation

  47. Effect of Q-Pt Location • From Analysis

  48. DC Srcs SHORTS in Small-Signal • In the small-signal equivalent circuit DC voltage-sources are represented by SHORT CIRUITS; since their voltage is CONSTANT, they exhibit ZERO INCREMENTAL, or SIGNAL, voltage • Alternative Statement: Since a DC Voltage source has an ac component of current, but NO ac VOLTAGE, the DC Voltage Source is equivalent to a SHORT circuit for ac signals

  49. Setting Q, Injecting v • Consider this ckt with AC & DC V-srcs Sets Q Sets vd

  50. Large and Small Signal Ckts • Recall from Chps 3 and 5 for Caps: • OPENS to DC • SHORTS to fast AC • Thus if C1 is LARGE it COUPLES vin(t) with the rest of the ckt • Similarly, Large C2 couples to the Load • To Find the Q-point DEcouplevin and voto arrive at the DCcircuit

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