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A FreeBSD-based prototype of a Time-Driven Priority router

This paper presents the first implementation of a Time-Driven Priority (TDP) router, a significant step beyond analytical studies and software simulations. Utilizing a FreeBSD-based architecture, the prototype aims to demonstrate the benefits of TDP through multimedia presentations, comparing video quality against traditional asynchronous packet switching. The system includes components like TDP input classifiers, output buffers utilizing ALTQ, and a TDP scheduler. Challenges related to interface servicing and potential bandwidth inefficiencies are discussed. Future work focuses on performance evaluation and creating a network testbed.

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A FreeBSD-based prototype of a Time-Driven Priority router

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  1. Politecnico di Torino Istituto Superiore Mario Boella A FreeBSD-based prototype of a Time-Driven Priority router Mario Baldi Guido Marchetto

  2. Goals • First implementation of TDP • Until now analytical studies and software simulations only • Identification of possible criticalities • Visually show TDP benefits through multimedia demonstration • Video quality with TDP vs asynchronous packet switching

  3. Network prototype topology TDP network router host

  4. Router architecture • PC based • FreeBSD operating system • Four components: • TDP input classifier • TDP output buffers (ALTQ extension) • TDP scheduler • Asynchronous input shaper(Dummynet extension)

  5. Common Time Reference (CTR) • Adopted card: Symmetricom • Periodic interrupt over the PCI bus • Programmable interrupt frequency • Each interrupt represents the beginning • of a new TF

  6. Implementation issues • Interfaces are not served at the same time • Interrupts are served with latency • Both servicing times are variable

  7. Consequences • Transmissions do not start as soon asthe TF begins • Violation of nominal time frame boundaries • Transmissions start with a variable delay • Potential bandwidth waste

  8. Facts • Latency equivalent to longer links • Interrupt and interface service latencyis low • Latency variation is absorbed by “delaying” forwarding time-frame • Interrupt and interface service latency has low variability • “EXTRA” CROSSING DELAY IN THE NODE • “EXTRA” BUFFERING IN ORDER TO HANDLE THIS DELAY

  9. Conclusions • Contribution • Proof of concept: • Algorithm and system semplicity(~1000 LOC) • PC architecture can support TDP • Future work • Performance evaluation • Realization of the network testbed and demonstration

  10. Thank you. Questions?

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