1 / 23

Embedded Systems Programming

Embedded Systems Programming. ARM assembler.

holland
Télécharger la présentation

Embedded Systems Programming

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Embedded Systems Programming ARM assembler

  2. @ A simple input output program using the StrongARM uart@ -----------------------------------------------------------------------@ Constant values used in this program .set SP1, 0x80010000 @ Base of the Microcontroller I/O space .set UTDR, 0x14 @ Offset to the Serial Data Register .set UTSR0, 0x1c @ Offset to SP status reg 0 .set UTSR1, 0x20 @ Offset to the Serial Status port .set UTSR1_TNF, 0b00000100 @ Mask to check Tx FIFO Not Full .set UTSR1_RNE, 0b00000010 @ Mask to check Rx FIFO Not Empty .set UTSR1_TBY, 0b00000001 @ Mask to check Tx Busy@ -----------------------------------------------------------------------@ Assembly-language preamble .text @ Executable code follows .balign 4 .global _start @ "_start" is required by the linker .global main @ "main" is our main program_start: b main

  3. @ -----------------------------------------------------------------------@ Start of the main programmain: ldr r1, =SP1 @ Use R1 as a base register for uart @ Read a character from the internal serial port1: ldrb r0, [r1, #UTSR1] @ Read the Serial Status port tst r0, #UTSR1_TNF @ Check if a character is available beq 1b @ No: wait until a character comes in ldrb r0, [r1, #UTDR] @ Read the actual character into R0 @ Send the character to the internal serial portwb1: ldrb r2, [r1, #UTSR1] @ Check the Serial Status port again tst r2, #UTSR1_TNF @ Can a character be sent out? beq wb1 @ No: wait until port is ready strb r0, [r1, #UTDR] @ Send the actual character out b 1b @ Do this forever (or until stopped)@ ----------------------------------------------------------------------- .end

  4. The example assembler program • Layout is very important • Labels must come first & use a colon : • Followed by instructions • Followed by comments • Separate comments start with @ sign

  5. Pseudo operands • There are 2 general types of data in an assembler program • Instructions • Pseudo operands • Instructions which directly generate code • mov r0, #10 • Pseudo operands which don’t. • .text • .balign 4

  6. Pseudo operands • .ascii & asciz • Create an ascii string + 0 byte • .balign n^2 • Align address by n^2 bytes • .code 16|32 • Set instruction for Thumb or ARM • .include <filename> • .macro <name> arg1, arg2, argn • Create a macro with args • Ended with .endm

  7. Pseudo operands • .section <section name> {flags} • Sections are .text, .data .bss • .set var_name, value • Set variable to value – same as .equ • .rept N • Repeat block N times end with .endr • .word word1, word2, wordn • Insert a list of 32 bit words

  8. ARM data instructions • Basic format: • ADD r0,r1,r2 • Computes r1+r2, stores in r0. • Immediate operand: • ADD r0,r1,#2 • Computes r1+2, stores in r0.

  9. ADD, ADC : add (w. carry) SUB, SBC : subtract (w. carry) RSB, RSC : reverse subtract (w. carry) MUL, MLA : multiply (and accumulate) AND, ORR, EOR BIC : bit clear LSL, LSR : logical shift left/right ASL, ASR : arithmetic shift left/right ROR : rotate right RRX : rotate right extended with C ARM data instructions

  10. Data operation varieties • Logical shift: • fills with zeroes. • Arithmetic shift: • fills with ones. • RRX performs 33-bit rotate, including C bit from CPSR above sign bit.

  11. ARM comparison instructions • CMP : compare • CMN : negated compare • TST : bit-wise AND • TEQ : bit-wise XOR • These instructions set only the NZCV bits of CPSR.

  12. ARM move instructions • MOV, MVN : move (negated) • MOV r0, r1 ; sets r0 to r1

  13. ARM load/store instructions • LDR, LDRH, LDRB : load (half-word, byte) • STR, STRH, STRB : store (half-word, byte) • Addressing modes: • register indirect : LDR r0,[r1] • with second register : LDR r0,[r1,-r2] • with constant : LDR r0,[r1,#4]

  14. ARM ADR pseudo-op • Cannot refer to an address directly in an instruction. • Generate value by performing arithmetic on PC. • ADR pseudo-op generates instruction required to calculate address: • ADR r1,FOO

  15. Example: C assignments • C: • x = (a + b) - c; • Assembler: • ADR r4,a ; get address for a • LDR r0,[r4] ; get value of a • ADR r4,b ; get address for b, reusing r4 • LDR r1,[r4] ; get value of b • ADD r3,r0,r1 ; compute a+b • ADR r4,c ; get address for c • LDR r2,[r4] ; get value of c • SUB r3,r3,r2 ; complete computation of x • ADR r4,x ; get address for x • STR r3,[r4] ; store value of x

  16. Example: C assignment • C: • z = (a << 2) | (b & 15); • Assembler: • ADR r4,a ; get address for a • LDR r0,[r4] ; get value of a • MOV r0,r0,LSL 2 ; perform shift • ADR r4,b ; get address for b • LDR r1,[r4] ; get value of b • AND r1,r1,#15 ; perform AND • ORR r1,r0,r1 ; perform OR • ADR r4,z ; get address for z • STR r1,[r4] ; store value for z

  17. Additional addressing modes • Base-plus-offset addressing: • LDR r0,[r1,#16] • Loads from location r1+16 • Auto-indexing increments base register: • LDR r0,[r1,#16]! • Post-indexing fetches, then does offset: • LDR r0,[r1],#16 • Loads r0 from r1, then adds 16 to r1.

  18. ARM flow of control • All operations can be performed conditionally, testing CPSR: • EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE • Branch operation: • B #100 • Can be performed conditionally.

  19. Example: if statement • C: if (a > b) { x = 5; y = c + d; } else x = c - d; • Assembler: ; compute and test condition ADR r4,a ; get address for a LDR r0,[r4] ; get value of a ADR r4,b ; get address for b LDR r1,[r4] ; get value for b CMP r0,r1 ; compare a < b BLE fblock ; if a ><= b, branch to false block

  20. If statement, continued ; true block MOV r0,#5 ; generate value for x ADR r4,x ; get address for x STR r0,[r4] ; store x ADR r4,c ; get address for c LDR r0,[r4] ; get value of c ADR r4,d ; get address for d LDR r1,[r4] ; get value of d ADD r0,r0,r1 ; compute y ADR r4,y ; get address for y STR r0,[r4] ; store y B after ; branch around false block

  21. If statement, continued ; false block fblock ADR r4,c ; get address for c LDR r0,[r4] ; get value of c ADR r4,d ; get address for d LDR r1,[r4] ; get value for d SUB r0,r0,r1 ; compute a-b ADR r4,x ; get address for x STR r0,[r4] ; store value of x after ...

  22. Example: Conditional instruction implementation ; true block MOVLT r0,#5 ; generate value for x ADRLT r4,x ; get address for x STRLT r0,[r4] ; store x ADRLT r4,c ; get address for c LDRLT r0,[r4] ; get value of c ADRLT r4,d ; get address for d LDRLT r1,[r4] ; get value of d ADDLT r0,r0,r1 ; compute y ADRLT r4,y ; get address for y STRLT r0,[r4] ; store y

  23. Conditional instruction implementation, continued. ; false block ADRGE r4,c ; get address for c LDRGE r0,[r4] ; get value of c ADRGE r4,d ; get address for d LDRGE r1,[r4] ; get value for d SUBGE r0,r0,r1 ; compute a-b ADRGE r4,x ; get address for x STRGE r0,[r4] ; store value of x

More Related