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FPGA Multipliers Radix 2 Sequential Multipliers

Lecture 8. FPGA Multipliers Radix 2 Sequential Multipliers. Required Reading. Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design. Chapter 9, Basic Multiplication Scheme Chapter 10, High-Radix Multipliers Chapter 12.3, Bit-Serial Multipliers

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FPGA Multipliers Radix 2 Sequential Multipliers

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  1. Lecture 8 FPGA Multipliers Radix 2 Sequential Multipliers

  2. Required Reading Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design Chapter 9, Basic Multiplication Scheme Chapter 10, High-Radix Multipliers Chapter 12.3, Bit-Serial Multipliers Chapter 12.4, Modular Multipliers

  3. FPGA Multipliers

  4. Notation Y Multiplicand Yk-1Yk-2 . . . Y1 Y0 X Multiplier xm-1xm-2 . . . x1 x0 P Product (Y  X ) pm+k-1pm+k-2 . . . p2 p1 p0 If multiplicand and multiplier are of different sizes, usually multiplier has the smaller size

  5. Xilinx FPGA Implementation Equations Z = (2xm-1+xm-2)  Y 2m-2 + … + (2xi+1+xi)  Y 2i + … + +(2x3+x2)  Y 22 + (2x1+x0)  Y 20 (2xi+1+xi)  Y = pi(k+1)pikpi(k-1)…pi2pi1pi0 pij = xiyj xor xi+1yj-1 xor cj cj+1 = (xiyj)(xi+1yj-1) + (xiyj)cj + (xi+1yj-1)cj c0 = c1 = 0

  6. Modified Basic Cell Xilinx FPGA Implementation xi+1 xi cj+1 yj yj-1 FA pij cj

  7. Modified Basic Cell Xilinx FPGA Implementation LUT: xiyj xor xi+1yj-1 cj+1 xi yi xi+1 LUT 0 1 yi-1 pij cj pij = xiyj xor xi+1yj-1 xor cj cj+1 = (xiyj)(xi+1yj-1) + (xiyj)cj + (xi+1yj-1)cj

  8. Xilinx FPGA Multiplier

  9. Radix 2 Sequential Multipliers

  10. Notation a Multiplicand ak-1ak-2 . . . a1 a0 x Multiplier xk-1xk-2 . . . x1 x0 p Product (a  x) p2k-1p2k-2 . . . p2 p1 p0 If multiplicand and multiplier are of different sizes, usually multiplier has the smaller size

  11. Multiplication of two 4-bit unsigned binarynumbers in dot notation Partial Product 0 Partial Product 1 Partial Product 2 Partial Product 3 Number of partial products = number of bits in multiplier x Bit-width of each partial product = bit-width of multiplicand a

  12. Basic Multiplication Equations k-1 x = xi  2i p = a  x i=0 k-1 p = a  x = a  xi  2i = = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 i=0

  13. Shift/Add Algorithm Right-shift version

  14. Shift/Add Algorithms Right-shift algorithm p = a  x = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 = = (...((0 + x0a2k)/2 + x1a2k)/2 + ... + xk-1a2k)/2 = k times p(0) = 0 j=0..k-1 p(j+1) = (p(j) + xj a 2k) / 2 p = p(k)

  15. Sequential shift-and-add multiplier for right-shift algorithm

  16. Right-shift multiplication algorithm: Example

  17. Area optimization for the sequential shift-and-add multiplier with the right-shift algorithm

  18. Shift/Add Algorithms Right-shift algorithm: multiply-add p(0) = y2k j=0..k-1 p(j+1) = (p(j) + xj a 2k) / 2 p = p(k) = (...((y2k + x0a2k)/2 + x1a2k)/2 + ... + xk-1a2k)/2 = k times = y + x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 = y + a  x

  19. Signed Multiplication • Previous sequential multipliers are for unsigned multiplication • For signed multiplication: • assume sign-extended operation for p(j) + xja • if 2's complement multiplier is POSITIVE right-shift sequential algorithms (shift-add) will work directly • if 2's complement multiplier is NEGATIVE than we must use "negative weight” for xk-1 and subtract xk-1a in the last cycle • Slight increase in area due to control and one-bit sign extension on inputs of adder • Unsigned: k bit number + k bit number  k+1 bit number • Signed: k+1 bit sign extended number + k+1 bit sign extended number  k+1 bit number

  20. Sequential multiplication of 2’s-complement numbers with right shifts (positive multiplier)

  21. Sequential multiplication of 2’s-complement numbers with right shifts (negative multiplier)

  22. Shift/Add Algorithm Left-shift version

  23. Shift/Add Algorithms Left-shift algorithm p = a  x = x0a20 + x1a21 + x2a22 + … + xk-1a2k-1 = = (...((02 + xk-1a)2 + xk-2a)2 + ... + x1a)2 + x0a= k times p(0) = 0 j=0..k-1 p(j+1) = (p(j) 2 + xk-1-ja) p = p(k)

  24. Sequential shift-and-add multiplier for left-shift algorithm Left shifts are not as efficient fortwo's complement because mustsign extend multiplicand by k bits

  25. Left-shift multiplication algorithm: Example

  26. Shift/Add Algorithms Left-shift algorithm: multiply-add p(0) = y2-k j=0..k-1 p(j+1) = (p(j) 2 + xk-(j+1)a) p = p(k) = (...((y2-k2 + xk-1a)2 + xk-2a)2 + ... + x1a)2 + x0a = k times = y + xk-1a2k-1 + xk-2a2k-2 + … + x1a21 + x0a= y + a  x

  27. Shift/Add Algorithm Right-shift version with Carry-Save Adder

  28. Sequential shift-and-add multiplier with a carry save adder

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