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MC68HC11 Instruction Set

MC68HC11 Instruction Set

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MC68HC11 Instruction Set

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  1. MC68HC11 Instruction Set

  2. Overview • 68HC11 instruction set • A quick look at the programming procedure • The programmer's model • Instruction types and formats • Addressing modes • A tour of the instruction set • Readings for instruction set: • Spasov, Chap. 2 and Appendix A • HC11 Reference Manual, Appendix A • HC11 Programming Reference Guide

  3. Looking ahead at the programming procedure: • Soon you'll write programs in assembly language for the HC11 • Here's a super simple example program: ; Super simple test program ORG $B600 TLOOP:INCA INCB JMP TLOOP • Before the HC11 can run this program, • The assembly-language code needs to be converted to machine language, and the machine-language code needs to be transferred to the HC11's memory SEGMENT code Cont..

  4. Looking ahead at the programming procedure: • Here is the machine code that results from the assembly-lang. program given above Address Contents $B600 01001100 $B601 01011100 $B602 01111110 $B603 10110110 $B604 00000000 Cont.

  5. Looking ahead at the programming procedure:

  6. Putting it all together • try1.asm is a source file • It is created by you, the programmer, using a text editor on your PC • Format: HC11 assembly language (ASCII text) • try1.lst is a listing file • It is created by AS11.exe, the assembler/linker that runs on your PC • (You'll probably run AS11.exe from DevHC11.exe) • Its purpose of the file is to help you debug the program – Format: ASCII text Cont.

  7. Putting it all together • try1.s19 is an object file • It is created by AS11.exe, the assembler/linker • Its purpose is to specify what bytes should be downloaded to the HC11, and to what locations in HC11 memory • Format: Motorola S-record (ASCII text) • Sometimes this is called a hex file • The object file is converted to executable machine code • The machine code is created by DevHC11.exe, the development environment that runs on your PC Cont..

  8. Putting it all together • Its purpose is to provide instructions and data to the HC11 Format: HC11 machine language (binary) • Sometimes this is called the binary code • The machine code is transferred to the HC11 through the coordinated efforts of DevHC11.exe (running on your PC) and the Buffalo monitor program (running on the HC11)

  9. Programmer’s Model • What features of the processor are most important to the assembly-language programmer? • Register set • Memory organization • Instruction set • Addressing modes • Here is the register set (again): Cont.

  10. Programmer’s Model • Accumulators • A: 8-bit general purpose accumulator • B: 8-bit general purpose accumulator • D: Double accumulator (concatenation of A and B for 16-bit operations) • Most operations can be done using either accumulator A or B • Index registers • X: 16-bit index register • Y: 16-bit index register • X and Y are used for indexed addressing • X is preferred, usually, because addressing with Y is slower and takes 1 extra byte of object code than with X Cont.

  11. Programmer’s Model • Operations on index registers: • Simple operations (INC, DEC, and ADD from B) can be performed • More complex operations are done by exchanging the index register and the D register, doing some computation, and then exchanging the values again • X or Y is often loaded with the base address of the I/O register address space ($1000) Cont.

  12. Programmer’s Model • SP: 16-bit stack pointer • Stack may be anywhere in the 64 Kbyte address space • The stack grows downward in memory (i.e., a push decrements SP) Cont.

  13. Programmer’s Model • PC: 16-bit Program Counter • CCR: -bit Condition Code Register • H, N, Z, V, C: rithmetic status bits • N: Negative result • Z: Zero result • V: Overflow result • C: Carry out from operation • H: Carry from low nibble (4 bits) of accumulator • S: Stop bit disabled • =1 disables STOP instruction • =1 after processor reset Cont…

  14. Programmer’s Model • I: Interrupt mask • =1 masks all maskable interrupts (not XIRQ) • =1 after processor reset • X: XIRQ interrupt mask • =1 masks XIRQ • =1 after processor reset (must be cleared just after reset)

  15. Overview of the 68HC11 instruction set • The instruction set specifies the kinds of data transfers and transformations that can occur in the machine • Instructions can be grouped into 5 broad categories • Data transfers: instructions that move data to and between registers • Logical: instructions that perform logic operations on data --AND, OR, etc. • Arithmetic: addition, subtraction, increment, etc. • Flow control: instructions that change the sequence of execution of a program --conditional and unconditional branches, stack operations, etc. • Input / Output operations Cont.

  16. Overview of the 68HC11 instruction set • An instruction generally consists of an opcode and some operand(s) • HC11 instructions are of different lengths (1 to 5 bytes) • The instruction set is summarized in Table A.1 of the text, Appendix A of the HC11 Reference Manual, and M68HC11 E Series Programming Reference Guide • Lists instruction mnemonic, brief description of the operation, addressing modes available, machine code format of the instruction, timing information, and effect on condition code registers Cont.

  17. Overview of the 68HC11 instruction set Cont.

  18. Overview of the 68HC11 instruction set • Opcode construction • In general, an n-bit opcode is capable of specifying any one of 2n instructions • With 8-bit opcodes, 256 distinct instructions are possible • 68HC11 has more than 300 actual instructions • 145 "basic" instructions plus “addressing variations” • 1 or 2 bytes of storage specify the opcode! • 1-byte opcodes • Most opcodes use just 1 byte • Downward compatible with 6801 Cont.

  19. Overview of the 68HC11 instruction set • 2-byte opcodes • Most 2-byte instructions deal with register Y, which was not present in the 6801 processor • It takes longer to fetch and execute 2-byte opcodes • New instructions use a "pre-byte", which signals that another opcode byte follows: $18, $1A, or $CD Ex. INX $08 INY $18 $08 Cont.

  20. Overview of the 68HC11 instruction set • Instruction format • An instruction is made up of an opcode and a set of operands • Opcode may be one or two bytes • Instructions may use 0, 1, 2, or 3 operands • Operands may be 1 or 2 bytes • Instruction lengths range from 1 to 5 bytes • Example (assume this is stored at address $E000): LDAA #$FF ; load ACCA with the ; Value $FF Machine code: $E000 $86 $E001 $FF Cont.

  21. Overview of the 68HC11 instruction set • Fetch/Execute operation: LDAA #$FF First clock cycle Cont.

  22. Overview of the 68HC11 instruction set • Fetch/Execute operation: LDAA #$FF Second clock cycle

  23. Addressing modes • How does the instruction specify the location of data? • The HC11 supports 5 different addressing modes • Inherent Addressing • Operands are specified implicitly in the opcode itself • Operands are contained in the registers instead of memory • Instruction length: or 2 bytes • Examples: • Register increment, clears CLRA • Register shift operations ASLA • Register additions ABA Cont.

  24. Addressing modes • How does the instruction specify the location of data? • The HC11 supports 5 different addressing modes • Inherent Addressing • Operands are specified implicitly in the opcode itself • Operands are contained in the registers instead of memory • Instruction length: or 2 bytes • Examples: • Register increment, clears CLRA • Register shift operations ASLA • Register additions ABA Cont.

  25. Addressing modes • Immediate addressing • One operand is included as part of the instruction word • Other operand (if needed) comes from an implied register • Instruction length: 2 -4 bytes • Specified operand is a constant and cannot be altered at run time • Mode is denoted by a # before the operand value • Example: LDAA #$05 $86 $05 Cont.

  26. Addressing mode • Direct addressing • The operand included in the instruction word is a memory address, specifying where the data is located • Second operand is an implied register • Instruction length: 2 -4 bytes • Since an address is specified, the data value itself can be changed during program execution • Address is a constant • Address included in the instruction word is only 1 byte • Direct addressing can only be used to reference locations $0000 --$00FF --256 locations Example: LDAA 05 $96 $05 Cont.

  27. Addressing mode • Extended addressing • Same as direct addressing, but with 2 bytes of address --the full range of addresses can be specified ($0000 to $FFFF) • Instruction length: 3 or 4 bytes • Example: LDAA $0005 $B6 $00 $05 • Why have both modes? Cont.

  28. Addressing mode • Indexed addressing • The effective address of the data in memory is computed as the sum of the value contained in an index register (X or Y) and an offset (contained in the instruction word) • The offset is a 1-byte unsigned quantity » Useful for table and array access • Eg. DAA $56,X $A6 56 Cont.

  29. Addressing mode • Relative addressing • Similar to indexed addressing uses PC value instead of the value in X or Y • Instruction's offset value is added to the value in the program counter to give the address of the next instruction • Used to specify branch addresses resulting from jump commands • Offset is an 8-bit 2's complement number --ranges from -128 to +127 decimal

  30. Basic tour of the instruction set • Load Instructions • Transfer data from memory to register • LDAA, LDAB, LDD, LDX, LDY, LDS • Different addressing modes supported • Assume the following memory contents: 0050 40 41 42 43 44 45 46 47 -48 49 4a 4b 4c 4d 4e 4f 2000 50 51 52 53 54 55 56 57 -58 59 5a 5b 5c 5d 5e 5f LDAA #$56 ; ACCA$56 (immediate) LDAB $56 ; ACCB = $46 (direct) LDAA $2000 ; ACCA = $50 (extended) LDD $2002 ; ACCD = $5253 (extended) Cont.

  31. Basic tour of the instruction set ; CCA = $52, ACCB = $53 LDX #$2000 ; IX = $2000 (immediate) LDAA $C, X ; ACCA = $5C (indexed) LDY #$56 ; IY = $56 (immediate) LDAB 0, Y ; ACCB = $46 (indexed) LDX $5, X ; IX = ? (indexed) • Store Instructions • Transfer data from register to memory • STAA, STAB, STD, STX, STY, STS • Direct, extended, or indexed addressing No immediate addressing Cont.

  32. Basic tour of the instruction set • Transfer Instructions • Transfer data from register to register TAB ; ACCA � ACCB TBA ; ACCB � ACCA TAP ; ACCA � CCR TPA ; CCR � ACCA TXS ; IX � SP TSX ; SP � IX TYS ; IY � SP TSY ; SP � IY XGDX ; IX � ACCD XDGY ; IY � ACCD Cont.

  33. Basic tour of the instruction set • Increment Instructions INC opr INCA INCB INX INY INS • Decrement Instructions DEC opr DECA DECB Cont.

  34. Basic tour of the instruction set DEX DEY DES • Clear Instructions CLR opr CLRA Rotate Instructions • Shifts all 8 bits plus the Carry bit circularly one position. ROL opr ROLA ROLB Cont.

  35. Basic tour of the instruction set ROR opr RORA RORB • Note: 9 rotates puts data back in original position (not 8 as stated in text) • Rotate Instructions Example Assume C = 1, ACCA = $3B Cont.

  36. Basic tour of the instruction set • Shift Instructions • Logical Shifts LSL opr LSLA LSLB LSLD LSR opr LSRA LSRB LSRD Cont.

  37. Basic tour of the instruction set • Shift Instructions • Arithmatic Shifts ASL opr ASLA ASLB ASLD ASR opr ASRA ASRB ASRD • ASR preserves sign bit • ASL/ASR can be used to multiply/divide by 2 • What is the difference between ASL and LSL? Cont.

  38. Basic tour of the instruction set • Logical Instructions • Bit-wise AND ANDA opr ANDB opr • Bit-wise OR ORA opr ORB opr • Bit-wise Exclusive-OR EORA opr EORB opr Cont.

  39. Basic tour of the instruction set • 1’s Complement COM opr COMA COMB • Arithmetic Instructions • Add instructions ABA ; ACCA + ACCB � ACCA ADDA opr ; ACCA + M � ACCA ADDB opr ; ACCB + M � ACCB ADDD opr ; ACCD + M � ACCD ADCA opr ; ACCA+ M+ C � ACCA Cont.

  40. Basic tour of the instruction set ABX ; IX + ACCB � IX ABY ; IY + ACCB � IY • Subtract Instructions SBA ; ACCA -ACCB � ACCA SUBA opr ; ACCA -M � ACCA SUBB opr ; ACCB -M � ACCB SUBD opr ; ACCD -M � ACCD SBCA opr ; ACCA -M -C � ACCA SBCB opr ; ACCB -M -C � ACCB Cont.

  41. Basic tour of the instruction set • Arithmetic Instructions • Unsigned arithmetic • Numbers range from $00 to $FF (0 to 255) • The carry bit (C) is set if result is outside range • Signed arithmetic • Numbers range from $80 to $7f (-128 to +127) • The overflow bit (V) is set if result is outside range • The negative bit (N) is set if result is negative (same as MSB of result) Cont.

  42. Basic tour of the instruction set • Arithmetic instructions • The same instructions are used for both signed and unsigned arithmetic • The CPU does not care whether the values are signed or unsigned • The arithmetic result is the same for both cases • C, V, and N bits are set based on Boolean combinations of the operands • Programmer must keep track of whether values are signed or unsigned • Whether to use the C or V bit to check for overflow Cont.

  43. Basic tour of the instruction set • Arithmetic Instructions • Example: • Add $56 + $B0 • Unsigned: $56 + $B0 = $106 (86 + 176 = 262) • Signed: $56 + $B0 = $06 (86 + (-80) = 6) LDAA #$56 LDAB #$B0 ABA ;ACCA = $06, C = 1, V = 0 • Example: • Add $56 to $60 • Unsigned: $56 + $60 = $B6 (86 + 96 = 182) • Signed: $56 + $60 = $B6 (86 + 96 = -74!!!) Cont.

  44. Basic tour of the instruction set LDAA #$56 LDAB #$60 ABA ;ACCA = $B6, C = 0, V = 1 • Multiplication • MUL instruction • Multiplies 8-bit unsigned values in ACCA and ACCB, then puts the 16-bit result in ACCD • Note that this overwrites ACCA and ACCB! • If you’re multiplying by a power of 2, you may want to use ASL instructions instead • Why? Cont.

  45. Basic tour of the instruction set • Binary Fractions • Multiplying two 8-bit numbers gives 16-bit result. What if you only want 8 bits? • Different ways to interpret 8-bit numbers • Unsigned integers 0 –255 • Signed integers -128 -+127 • Binary fractions 0 -1 • $00 = 0/256 = 0 • $80 = 128/256 = 0.5 • $FF = 255/256 = 0.9961 • You can use the ADCA instruction after a MUL to convert 16-bit result to 8-bit binary fraction • MUL sets C to 1 if bit 7 of ACCB is 1 Cont.

  46. Basic tour of the instruction set • Binary Fractions • Example: • Multiply $20 x $35 (32 x 53 in decimal) • Unsigned integers: • $20 x $35 = 32 x 53 = 1696 = $6A0 LDAA #$20 LDAB #$35 MUL ; ACCD = $06A0, C = 1 ; ACCA=$06, ACCB=$A0 • Binary fractions: • (32 / 256) x (53 / 256) = 1696 / 65,536 Cont.

  47. Basic tour of the instruction set = 6.625 / 256 = 7 / 256 LDAA #$20 LDAB #$35 MUL ; ACCD = $06A0, C = 1 ADCA #$00 ; now ACCA = $07 • Integer Division • IDIV • Divides 16-bit unsigned integer in ACCD by 16-bit unsigned integer in IX • Puts quotient in IX, remainder in ACCD • Example: 6 / 4 Cont.

  48. Basic tour of the instruction set LDD #$6 ; ACCD = $6 LDX #$4 ; IX = $4 IDIV ; IX = $1, ACCD = $2 • Note: IDIV takes 41 cycles to execute • You can use ASR instructions to divide by powers of 2 • Only gives you the quotient, not the remainder • Divide by zero • IX set to $FFFF, C set to 1 • Fractional Division • FDIV • Divides 16-bit binary fraction in ACCD by 16-bit fraction in IX • 16-bit values between 0 and 1 Cont.

  49. Basic tour of the instruction set • 16-bit values between 0 and 1 • Puts quotient in IX, remainder in ACCD • Often used to convert remainder from IDIV into a fraction • Example: 6/4 LDD #$6 LDX #$4 IDIV ; IX = $1, ACCD = $2 STX Somewhere ; store quotient LDX #$4 ; reload denominator FDIV ; IX = $8000, ACCD = $0 ; (Note $8000 = 0.5) Cont.

  50. Basic tour of the instruction set • Floating point numbers • Used to increase the range of number representation past that of integer formats • Due to 8-bit CPU, IEEE floating point standard is not supported on the HC11 • Motorola has a non-standard format • Floating point routines can be downloaded from the Motorola web site if you need these for projects (you will not need them for the labs) • CCR Operations CLC ; clear the C bit CLV ; clear the V bit SEC ; set the C bit SEV ; set the V bit Cont.