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J. McCalley

J. McCalley. Voltage source converter. Below is the basic topology of the back-to-back 2-level voltage source converter (VSC). Basic topology. Our interest is to study the operation of this converter. We focus on the grid-side converter; operation of the rotor-side converter is similar.

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J. McCalley

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  1. J. McCalley Voltage source converter

  2. Below is the basic topology of the back-to-back 2-level voltage source converter (VSC). Basic topology Our interest is to study the operation of this converter. We focus on the grid-side converter; operation of the rotor-side converter is similar. There are different VSC switching strategies, including square-wave operation, carrier-based PWM (SFO-PWM, RS-PWM, NRS-PWM, SHEM, SV-PWM), and hysteresis switching techniques (see ch. 2 in Anaya, Lara, and Jenkins, “Wind Energy Generation Systems : Modelling and Control,” Wiley, 2009; ch 2 in Abad, Lopez, Rodriguez, Marroyo, & Iwanski, “Doubly Fed Induction Machine: Modeling & Control for Wind Energy Generation,” and ch 4 in Wu, Lang, Zargari, and Kouro, “Power conversion and control of wind energy systems.”) We will study SV-PWM in what follows. IGBT 2

  3. Filters: To eliminate harmonics Double-fed induction generator Grid-side converter (GSC): Controls DC-link voltage and the AC-side reactive power. Rotor-side converter (GSC): Controls torque and reactive power of generator Capacitor: Maintains constant DC voltage If C is very large, then we need to wait a long time for v(t) to change significantly from v(t0). Control intelligence: Identifies when each IGBT is turned on and when it is turned off. 3

  4. Below is an illustration of the grid-side converter. • In the figure, we have represented ideal bi-directional switches. It converts voltage and currents from DC to AC while the exchange of power can be in both directions • From AC to DC (rectifier mode) • From DC to AC (inverter mode). • The ideal switch is implemented by an insulated gate bipolar transistor (IGBT). We will not consider switching time or voltage drops for our ideal switches. Grid-side converter There is also a grid-side filter to smooth the voltage waveforms generated. The filter is composed of only inductances in this case, but other filter designs are used. The command of the upper switches are made by signals Sag, Sbg, and Scg, and of the lower switches by signals S’ag, S’bg, and S’cg. We will require, for any leg, that the state of the lower switch be opposite to the state of the upper switch, i.e., where the overbar means “complement.” 4

  5. By inspecting the switching circuit, we observe that the DC voltage Vbus is connected across phase a when Sag=1 (closed), which necessarily implies S’ag=0. A similar thing can be said for the b-phase and for the c-phase. Noting the location of the point “o” on the DC bus, we may represent this according to: Grid-side converter The point “o” is the DC bus low side. The point “n” is the AC bus neutral. Generalizing the above results in We note that this converter may have two possible voltages for each phase, Vbus or 0; therefore it is referred to as a two-level converter. Multi-level converters are also used. 5

  6. But now let’s consider the phase voltages to neutral. Focusing on only the a-phase, we can draw the below figure. Filter Grid-side converter + + vao van vno - - - + For balanced voltages, Balanced: Phase voltages have same magnitude, separated in time by 120°. n o Then we can write that Substitute in above expressions to the left: Similarly, Generalizing, Substitute above into left-hand vjn expressions… 6

  7. Grid-side converter From slide 5: Substitute these vjo expressions on the left into the vjn expressions above. 7

  8. Substitute in above expressions to the left: Grid-side converter We have expressed our line-to-neutral voltages in terms of the switch statuses: 8

  9. How many different combinations of switches do we have? 000, 001, 010, 011, 100, 101, 110, 111 We need specify only the top three switches as each top switch determines the status of the bottom switch via the complementary operation (see slide 4): Grid-side converter We can observe the different switch states to the right 9

  10. How many different combinations of switches do we have? 000, 001, 010, 011, 100, 101, 110, 111 Lets evaluate our van equations for each switch status. For example, for 000: Grid-side converter For example, for 001: 10

  11. The following table provides switch status, vjo, and vjn for all eight states. Grid-side converter Notice that vjo takes only two different voltage levels, but van takes five different voltage levels. 11

  12. Let’s order the switching states as follows: Sag t4 t6 t2 t5 t1 t3 t1 110 t2 100 t3 101 t4 001 t5 011 t6 010 Sbg DC-AC conversion Scg 2Vbus/3 Vbus/3 van This is called a six pulse generation scheme. -Vbus/3 -2Vbus/3 Now compute the resulting vjn outputs using: 2Vbus/3 Vbus/3 vbn -Vbus/3 -2Vbus/3 2Vbus/3 Vbus/3 vcn And plotting them on the right, we observe the resulting vjn outputs… -Vbus/3 -2Vbus/3 12

  13. This is an AC voltage! We can obtain the Fourier series of this function according to Harmonic analysis of van 2Vbus/3 Vbus/3 van -Vbus/3 -2Vbus/3 2Vbus/3 Vbus/3 Observe van(t): - This function is half-wave symmetric (f(t-T0/2)=-f(t)) even harmonics n=0,2,4,…don’t exist - It is also an odd function (symmetric about the origin) and therefore vbn -Vbus/3 -2Vbus/3 2Vbus/3 Vbus/3 vcn -Vbus/3 -2Vbus/3 13

  14. 2Vbus/3 So let’s compute the bn coefficient for van. Vbus/3 van -Vbus/3 -2Vbus/3 Harmonic analysis of van Observe that harmonics of multiples of 3 also do not exist, since for n=3,6,9,…  Therefore, only n=1, 5, 7, 11, 13, 17, 19, 23, 25, 29, … exist. 14

  15. The amplitude of the different harmonics, for Vbus=1, would then be: Harmonic analysis of van 15

  16. n=1,5 n=1,5,7 n=1 Harmonic analysis of van n=1,5,7, 11 n=1,5,7, 11,13, 17 n=1,5,7, 11,13 n=1,5,7, 11,13, 17, 19 • Observe the fundamental at the top left. • Also observe as we add more terms to the Fourier series, the waveform more closely approximates the true van on slide 12. … 16

  17. Recalling the values of the line-to-neutral voltages from slide 10: α-β components of line-to-neutral voltages We can express the three-phase voltages in terms of α-β components. For example, consider the three-phase voltage corresponding to the 001 state in the table above: Continuing in like manner for all of the eight switching states, we get…. 17

  18. Observe we have named each switching state under the column labeled “Vector” as V0, V1, V2,…. We represent these vectors, together with the α-β reference frame, on the “space-vector diagram” below. α-β components of line-to-neutral voltages We label V1-V6 “active” vectors & V0, V7 vectors “zero” vectors. Note the sector labels. Sector II Recall the α-β transform: Sector I Sector III Substitute into the space-vector expression Sector IV Sector VI 18 Sector V

  19. Space vector representation of line-to-neutral voltages Consider the switching state 100. From the table on slide 17, we see that for this state: Substitution of the above expressions into the space vector expression yields: From table on slide 18. 19

  20. If we follow the same procedure for all six, it is possible to show that the general expression for the kth space vector is: Space vector representation of line-to-neutral voltages These active vectors and the zero vectors do not move in space and are therefore called “stationary” vectors. Let’s consider a rotating space vector, , which rotates counterclockwise at an angular velocity of ω=2πf, where f is the fundamental frequency of the inverter output voltage. Recall that the angular displacement between and the α-axis of the α-B reference frame is obtained from: We desire to generate a space vector, of any magnitude or angle using our switches. In doing this, we consider the stationary vectors as the representation for each switching status. So how to use these stationary vectors to generate any particular space vector? To do this, we have to closely consider one switching attribute that we have not yet considered. Dwell time. 20

  21. Define: sampling period TS is the time for which the reference vector has a particular magnitude and angle. We assume it is sufficiently small so that the reference vector can be considered constant over this time. Under this assumption, can be approximated, whatever its magnitude and angle, by three stationary vectors. Dwell-time calculation Given the reference vector is within a certain quadrant, then these three stationary vectors will be the two active vectors comprising the quadrant’s boundary, together with a zero vector. • Then the dwell time for each stationary vector is captured by any of the following ideas: • the amount of time it is allowed to be “on,” • the amount of time it “dwells” • the duty cycle time (on-state or off-state time) of the chosen switches during the sampling period. To determine the dwell times necessary for each stationary vector to obtain the reference space vector, we need the following principle (next slide)…. 21

  22. Volt-second balancing principle: The product of the reference voltage and sampling period TS equals the sum of the voltage multiplied by the time interval of the chosen stationary vectors. It is interesting to consider the units of a volt-sec: Dwell-time calculation A joule/amp is a unit of flux, called a weber. Also, recall Faraday’s law: Understanding 1: We maintain a Δλ=vrefTs, but we use a set of V’s and Δt’s to do it. Understanding 2: To achieve a certain reference voltage , we will turn one stationary vector on for some time Ta, another stationary vector on for some time Tb, and the third stationary vector (the zero vector) on for some time T0, such that TS=Ta+Tb+T0, and the total volt-seconds associated with the desired reference vector, , must be the same as the total volt-seconds associated with the three stationary vectors during their respective dwell times, i.e., We provide an example on the next slide…. 22

  23. Sector II Sector I Sector III vref Dwell-time calculation ω θ Sector IV Sector VI Sector V For this example, the stationary vectors on either side of the reference vector are the 100 (V1) and the 110 (V2) vectors. Observing that and from the table on slide 18, we know that Substitute the above into: 23

  24. Now split into real (α-axis) and imaginary (β-axis) as follows: Dwell-time calculation 24

  25. Recall our timing constraint: And the two equations we just derived: Dwell-time calculation These are three equations with three unknowns (Ta, Tb, T0), and we may solve them. Skipping the algebra, we obtain: 25

  26. The below figure provides intuition in regards to the relation between the dwell-time calculation and the reference vector. Only Sector I is shown, since this is the sector where our reference vector resides. The contributions of V1, V2, and V0 to the reference vector are proportional to the ratio of their respective dwell times to the sample time. This is consistent with the balancing principle. Dwell-time calculation In the below, what can you say about Ta, Tb, and/or T0? • If vref lies exactly exactly in the middle between V1 and V2 (θ=π/6), then... • Ta=Tb. • If vref is closer to V2, then… • Tb>Ta. • If vref is coincident with V2, or V1, then… • Ta=0, or Tb=0, respectively. • If the head of vref is right on Q, then… • Ta=Tb=T0. • For a given θ, vector magnitude decreases as T0 increases Summary: 26

  27. One can derive these relationships between Ta and Tb, on the one hand, and θ and π/6, on the other by observing that: Dwell-time calculation Thus: Whereas the above sets the angle, the magnitude is set by the amount of 27

  28. Whereas the relations on the previous slide set the angle, the magnitude is set by the amount of zero-vector hold time. This can be seen by observing that as vref is increased in the below expressions, the amounts Ta and Tb increase proportionally (but vref does not affect the determination of θ). Said another way, increasing T0 would necessitate decreases in Taand Tb, but if those decreases were proportional, then they would affect only vref but not θ. Dwell-time calculation 28

  29. Recall our expressions from slide 25 to compute dwell times. These equations were only applicable for Sector I, therefore we had to qualify them with: Dwell-time calculation However, we can use these equations for other sectors as well as follows: Subtract off an appropriate multiple of π/3 from the actual angular displacement θ such that the modified angle θ’ falls into the range between 0 and π/3. where k=1,2,…,6 for sectors I, II, …, VI, respectively. The calculated dwell times will be for the stationary vectors on either side of the sector. 29

  30. Dwell-time calculation: switching freq fsw=720Hz, vref=563.38v, VDC=1220v θ‘ =50° θ =230° Sector IV (k=4) These times are then applied as follows: 30

  31. Dwell-time calculation: switching freq fsw=720Hz, vref=563.38v, VDC=1220v θ =230° Sector IV (k=4) We can then check it by computing: And with VDC=1220v, we have: 31

  32. Definitions: • Particular space vector: a space vector with a given magnitude and angle. • Sampling period: Ts=1/fsw. The time to implement a particular space vector. • Switching state: a realization of the converter’s switch statuses. • Switching sequence: a series of switching states through a sampling period necessary to represent a particular space vector. Switching sequence • Given that we want to realize a particular space vector, and that we have computed the corresponding dwell times, then we must arrange a switching sequence to achieve it. Some points: • The switching sequence is not unique; it is possible to achieve it in different ways. • A basic requirement is that, for a given number of switching states per sampling period Ts, we want to minimize the number of switchings per sampling period Ts. The motivation for this is that each switching action incurs losses, and so we minimize losses if we minimize switchings. To implement this requirement, we will require that a transition from one switching state to the next involve only two switches, and they must be in the same inverter leg. This last requirement (that they must be in the same inverter leg) means that any change from one switching state to the next will involve toggling for only a single “j” where, vjo=VBusSjg, Sjg={0,1}, j=a,b,c. 32

  33. state 1 state 2 state3 state4 state 5 state 6 state 7 Sag, va0 000 100 110 111 110 100 000 We are plotting the switch status (0,1) or the voltage vj0. vref Switching sequence Sbg, vb0 Scg, vc0 This figure is for only one position of the space vector within one sector (sector 1). SVM will have N positions per sector, with 6 sectors, and so 6N different switching sequences are needed to move the space vector through 360°. This switching sequence has 7 states (sometimes also called a 7-segment switching sequence). 33

  34. state 1 state 2 state3 state4 state 5 state 6 state 7 Sag, va0 000 100 110 111 110 100 000 vref Switching sequence Sbg, vb0 Scg, vc0 • Only the vectors bounding the sector and the zero vectors are used. • Moving from one vector to an adjacent vector only involves toggling one bit, implying that only two switching operations (for a single leg, the top switch and the bottom switch). 34

  35. state 1 state 2 state3 state4 state 5 state 6 state 7 Let’s exchange the locations of vectors V1 and V2 in states 2,3 and in states 5,6 (we also carry the dwell times with the states). What happens to the total number of switchings? Sag, va0 000 100 110 111 110 100 000 Switching sequence Sbg, vb0 Scg, vc0 • state 4 to 5: 1 • state 5 to 6: 1 • State 6 to 7: 1 Count the switches: • state 1 to 2: 1 • state 2 to 3: 1 • State 3 to 4: 1 Total number of switchings: 6 35

  36. state 1 state 2 state3 state4 state 5 state 6 state 7 This does achieve the desired space vector (dwell times are still the same) but it does so with 10 switchings instead of 6. So this is an undesirable switching sequence. Switching sequence • state 4 to 5: 2 • state 5 to 6: 1 • State 6 to 7: 2 Count the switches: • state 1 to 2: 2 • state 2 to 3: 1 • State 3 to 4: 2 Total number of switchings: 10 36

  37. state 1 state 2 state3 state4 state 5 state 6 state 7 Sag, va0 000 100 110 111 110 100 000 Switching sequence Sbg, vb0 Scg, vc0 • Each of the switches in the inverter turns on and off once per sampling period, so that the switching frequency of the devices is thus equal to the sampling frequency. 37

  38. state 1 state 2 state3 state4 state 5 state 6 state 7 Sag, va0 000 100 110 111 110 100 000 Switching sequence Sbg, vb0 Scg, vc0 • The total time adds to Ts. 38

  39. state 1 state 2 state3 state4 state 5 state 6 state 7 Sag, va0 000 100 110 111 110 100 000 Switching sequence Sbg, vb0 Scg, vc0 • It starts and ends with the zero vector V0, each for time T0/4. • The other T0/2 time for the zero vector is during the middle interval, but V7 is used, because if we were to use V0 during the middle interval, we would have to switch more than 2 switches. So the redundant zero vectors are both useful. 39

  40. So we have just one switching sequence for a given sector, and we rotate the space vector through that sector by changing dwell-times appropriately. • But for each sector, we will use the zero vectors with a unique pair of active vectors, therefore each sector will have its own unique switching sequence, as shown below. Switching sequence 40

  41. We could design a 5-state (5-seqment) switching sequence for sector 1, in two different ways, below. Switching sequence Sag, va0 Sbg, vb0 Scg, vc0 41

  42. And the 5-state switching sequences for each sector appear below. Switching sequence But the 5-state switching sequence has more harmonic distortion than the 7-state. Thus, the tradeoff is between • losses (good for low switching states) and • distortion (good for high switching states). 42

  43. Recall from slide 7 that from our switch statuses, we may evaluate van, vbn, and vcn. Computing space vector from switching sequence Then from knowledge of van, vbn, and vcn, we can compute the space vector:. 43

  44. Alternatively, you evaluate van, vbn, and vcn from the switch statuses, as on the previous slide, and then compute the α-β components according to:. Computing space vector from switching sequence Then from knowledge of vα, vβ, we can compute the space vector according to:. 44

  45. Finally, we can compute the space vectors from dwell times and appropriate vectors. For example, in sector I, we have. Computing space vector from switching sequence where 45

  46. You should be able to • For a specified space vector (magnitude and angle), identify dwell times and then the switching sequence necessary to achieve it. • For a specified switching sequence, identify the associated space vector. What you should be able to do 46

  47. Modulation index A larger view See slide 37, repeated on the next slide, for Table 4-4 47

  48. A larger view 48

  49. Homework One question: What does (e) mean? Answer: These are the three stationary vectors V1, V2, and V0. I mean for you to evaluate them and give a numerical answer. 49

  50. Number of states is driven by harmonic minimization. Minimizing losses means minimizing switchings for the given number of states. • You are looking for a good balance between • number of states (which you like to be high) and • switchings (which you like to be low). • In the sequence, V0, V1, V2, V0, you end up with only four states, and V2 to V0 would require 2 switches for a single state transition for a total of 4 states and 4 switches. • The five state sequence gives 5 states with only 4 switches and so is better. • The 7-state sequence gives 7 states and 6 switches, and so compared to the 5-state sequence, is worse for efficiency but better in harmonics. Comment on # of states vs. switching sequence 50

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