FPGA implementation of population-based ant colony optimization

1. B. Scheuermann a,∗, K. Sob, M. Guntsch a, M. Middendorf c, O. Diessel b, H. ElGindy b, H. Schmecka (2004) A review by Jacob Gillson FPGA implementation of population-based antcolony optimization

2. Outline • P-ACO Introduction • Algorithm • Implementation on FPGA • Experimental Results • Contributions • Critique • Conclusion • Q&A

3. Optimization • The goal is to find the best possible solution to a hard problem • Many problems take an impractical amount of time to solve exactly. Can be solved using heuristics • Combinatorial optimization attempts to find an optimal object (solution) from a finite set of objects • Travelling Salesman Problem • Minimum Spanning Tree

4. P-ACO Overview • Population-basedAntColonyOptimization • Based on the path-finding abilities of ant workers • Uses a heuristic approach to solving combinational optimization problems • The ants use pheromone trails to guide other workers back to the food source

5. Implementing P-ACO • Each FPGA maintains a colony of virtual “ants” in the form of solution generators • The generators choose their solutions based on pheromones made from past solutions • Each solution from each generator is compared to previous solutions • The most successful x solutions are added to a solution matrix

6. P-ACO Architecture

7. Finding Solutions • The pheromone matrix is initialized with random values • The ant chooses next path based on the pheromone strength at current node • Adds choice to a solution register • Repeats until all nodes have been used • Solution is compared to other ants • Best x solutions are added to population queue • New pheromone matrix is generated

8. Choosing The Solution • The process continues until a stopping condition has been met • Set # of iterations • Best solution hasn’t changed after # iterations • The population module returns the elitist solution to the top module • This is hopefully a near optimal solution to the problem given

9. Experimental Results • The colony was implemented on a Xilinx Virtex-II Pro • Compared to an AMD uni-processor system clocked to 1540 MHz • Runs a SMTTP (Single Machine Total Tardiness Problem) • Both the problem size n (number of nodes) and the colony size m (number of ants) are varied during experimentation

10. Resource Use Uses a fixed number of ants m = 8 Uses a fixed problem size n = 64

11. Resource Use • Due to increasing complexity, as the problem size and colony size increases, so must the on board resource use • With a fixed colony, the size complexity of LUTs and REGs increases at ~O(nlog(n)) • With fixed problem size, complexity is ~O(n)

12. Time Comparisons

13. Time Comparisons • The hardware implementation is at least 1.8x faster than software • Fixed problem size shows a large increase in speedup as all the ants run in parallel • Is limited by the number of BRAM cells on the FPGA • Fixed colony size shows a more modest speed-up • But only reliant on LUTs and REGs

14. Contributions • Proves that P-ACO and other optimization algorithms can be implemented on commercially available FPGAs • Can be modified to obtain near-optimal solutions for most combinational optimization problems • Provides a large advantage over software-only implementations

15. Critiques • Very in-depth and technical paper. Explains all decisions in detail and is entirely reproducible • Concepts become to technical at points and can be hard to follow • Many alternate designs and improvements suggested but were not acted upon • Hardware implementation is realistically limited to very small problem sets • The heuristic information was disregarded in the hardware implementation

16. Conclusion • P-ACO algorithm successfully implemented on Virtex-II Pro FPGA • Showed that ant colony optimization was possible on commercial boards • Provided at least 1.8x speedup during experimentation over software • Limited to small problem sizes due to lack of resources

17. References • Virtex-II datasheet -http://www.xilinx.com/support/documentation/data_sheets/ds083.pdf • Virtex-VII datasheet -http://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf • Combinatorial Optimization -https://en.wikipedia.org/wiki/Combinatorial_optimization • FPGA implementation of population-based ant colony optimization - B. Scheuermann et al. • Ant Colony Optimization - V. Maniezzo et al. • Ant diagram - https://en.wikipedia.org/wiki/Ant_colony_optimization

18. Questions?

19. Extra Slides

20. Generator Block Architecture

21. Population Block Architecture

22. Comparator Block Architecture