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Maximizing Power Efficiency with ARM big.LITTLE Technology

Learn about ARM's big.LITTLE technology designed to maximize power efficiency with minimal performance sacrifice by distributing tasks unevenly between CPU cores. Explore cluster migration, in-kernel switcher, and heterogeneous multiprocessing models. Discover the benefits and results of big.LITTLE architecture through white papers and case studies. See how manufacturers like Qualcomm, Nvidia, and MTK implement this technology to achieve power efficiency.

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Maximizing Power Efficiency with ARM big.LITTLE Technology

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  1. Progress Report 2013/10/30

  2. ARM big.LITTLE • Goal • maximize power efficiency with only a modest performance sacrifice. • Task should be distributed unevenly. • Only critical tasks should execute on big CPUs to minimize power consumption.

  3. Three Models • Cluster migration • In-Kernel Switcher(CPU migration) • Heterogeneous multi-processing (global task scheduling)

  4. In-Kernel Switcher

  5. Cortex-A15-Cortex-A7 DVFS Curves

  6. big.LITTLE extends DVFS

  7. IKSResults • BBench page + Audio on TC2

  8. Todo • White papers about big.LITTLE • Big.LITTLE Processing with ARM Cortex-A15 & Cortex-A7 • ARM, Sep. 2011. • Benefits of the big.LITTLEArchitecuture • Samsung, Feb. 2012.

  9. Manufacturers Other than ARM • Qualcomm • Dynamically enables partial or all CPU cores and adjusts CPU frequency to achieve power efficiency. (HMP) • Nvidia • N+1, one slow core and N fast ones. • Currently N = 4. • MTK • HMP(?)

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