Adviser ： Zhi-Ming Lin postgraduate： Yuan-Zhi Cao

1. Adaptive Low/High Voltage Swing CMOS Driver for On–Chip InterconnectsCircuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on27-30 May 2007 Page(s):881 - 884 Adviser：Zhi-Ming Lin postgraduate：Yuan-Zhi Cao

2. Outline • Introduction • Driver Circuit Structure • Circuit Operation • Comparative Evaluation

3. Introduction • Driving large capacitive loads associated with the global interconnects limits the performance and power dissipation of CMOS circuits at low voltages • Most effective technique for global interconnects to achieve power reduction and energy–delay efficiency is to reduce the voltage swing of the signal on the wire.

4. Driver Circuit Structure

5. Output in low state In this state, the output is driven low through the diode connected pair MD10–MD11.

6. Low-to-high transition delay in the feedback loop XIF1 This causes MU7, and MU10 to turn on and pull the output node out to high, strongly, to charge up the output load

7. Output in high state In this state, the output is driven high through the diode connected pair MU10–MU11.

8. Comparative Evaluation

9. Comparative Evaluation

10. Comparative Evaluation

11. Thanks for your attention