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Sub- Nyquist Reconstruction Midterm Presentation Winter 2010/2011

Technion Israel Institute of Technology. Sub- Nyquist Reconstruction Midterm Presentation Winter 2010/2011. By: Yousef Badran Supervisors: Asaf Elron Ina Rivkin. Project Overview. Part of the Modulated Wideband Converter project cluster.

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Sub- Nyquist Reconstruction Midterm Presentation Winter 2010/2011

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  1. Technion Israel Institute of Technology Sub-NyquistReconstructionMidterm PresentationWinter 2010/2011 By: YousefBadran Supervisors: AsafElron Ina Rivkin

  2. Project Overview • Part of the Modulated Wideband Converter project cluster. • A system for sub-Nyquist sampling of multiband signals. • Sub-module of the reconstruction block. • To be implemented on AlteraStratix III (EP3SE260) FPGA device, using a single FPGA out of 4 available FPGAs.

  3. Project Block Diagram

  4. Input and Output Input: Sequences z[n] representing spectrum slices At most N sequences, one per slice Spectral support slices s Problem: Spectral support and carrier frequencies of bands are unknown. A single slice may contain more than one band (at most N/2). A single band might be divided between two slices.

  5. Input and Output • Output: • A sequence of numbers, at most N/2 pairs of numbers per spectral slice. • Each pair of numbers describes the beginning and end of energy in a slice • Requires high resolution vectors for accurate results.

  6. Welch’s Method for Power Estimation Algorithm • Divide the time signal into successive, overlapping blocks. • Form the periodogram for each block: • The Welsh estimate of the power spectral density is given by: • (K= # of blocks) • Contradiction:Maximize M for spectral resolution vs. Maximize K for better averaging results and greater spectral stability. • Typical choice:

  7. Welch’s Method (Cont.) Demands • 18-bit fixed-point representation. • 17 bit word length • 1 bit fraction length • Problem? • MATLAB’s FFT does not support fixed point operations. • Solution: • Use Simulink FFT block instead. • Problem? • Simulink Fixed-point block-set license keys was not acquired by the Technion . • Alternatives: • Use Altera FFT MATLAB model (?) • Find an alternative fixed point FFT calculation published on the internet.

  8. Welch’s Method for Power Estimation Comparision between MATLAB’s PWELSH, and my own: (M=256, R=128)

  9. Welch’s Method for Power Estimation Comparision between MATLAB’s PWELSH, and my own: (M=256, R=128)

  10. Quantization • Uniform Quantization and Dynamic Range: • Map amplitude values into a set of discrete values, depending on the dynamic range of the signal values and perceptual sensitivity. • Useful for band recognition and band level separation. • Helps identify and recognize weak signals. • Helps identify strong signals that exceed the domain range. • Helps separate different signals located on the same band.

  11. ALTERA FFT MegaCore Function The FFT MegaCore function is a high performance, highly-parameterizable Fast Fourier transform (FFT) processor. The FFT MegaCore function implements a complex FFT or inverse FFT (IFFT) for high-performance applications. Features (resolution of 4096 bits): • Bit-accurate MATLAB models. • Reduced memory requirements. • Maximum system clock frequency >300 MHz (vs. Input freq. of 20 MHz). • Low multipliers usage (~20/384 Mul. Blocks) • High Logic Registers usage (~7-10%).

  12. Resources

  13. Project Workflow • Algorithm • MATLAB • Mathematical Tools • Find an alternative fixed • point FFT Solution • Find implementations of • required mathematical • operations in VHDL • Resources & • requirements • Understand theory and • reference implementation • Propose alternative • and equivalent calculation • Floating-point • representation • 18-bit fixed point • representation • Design Simulation • Synthesis & Debug • ModelSim • Creattestbench for each • VHDL design • Simulations • Synthesis • Timing simulations using • AlteraStratix IIIlibraries • Debugging the system • VHDL Design • Creating a block diagram • Altera DSP designer • Implement missing • mathematical tools • in VHDL

  14. Next Steps

  15. Thank you!

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