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Magic-State Functional Units

This paper discusses the techniques of mapping and scheduling multi-level distillation circuits for fault-tolerant quantum architectures, focusing on magic-state distillation and braiding operations. It presents concatenation and force-directed annealing techniques and provides results on fault-tolerant operations and the cost of permutation steps. The paper also explores communication via braiding and techniques for congestion minimization. The force-directed annealing method is evaluated, and the results show a reduction in circuit latency and edge crossings. The paper concludes with the optimization of multi-level circuits using hierarchical stitching.

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Magic-State Functional Units

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  1. Magic-State Functional Units Mapping and Scheduling Multi-Level Distillation Circuits for Fault-Tolerant Quantum Architectures OCT 24, 2018 Ding, Y., Holmes, A., Javadi-Abhari, A., Franklin, D., Martonosi, M., & Chong, F. T.  ArXiv: 1809.01302 DOI: 10.1109/MICRO.2018.00072

  2. OUTLINE 1 Background Magic-State Distillation and Braiding Our Techniques 2 Concatenation and Force-directed Annealing 3 Results

  3. FAULT-TOLERANT QC Operations on Error-Corrected Quantum Computers Difficult 2-qubit gate: CNOT gate Easy single-qubit gates: H X Z Expensive to implement: requires braiding Difficult single-qubit gate: T gate T | Useful applications contain a significant number of T gates. Consume: 1 magic state Expensive to implement: requires magic state distillation

  4. MAGIC-STATE DISTILLATION Magic State Distillation is Expensive Quantum Chemistry *Ising Model of spin chain with size 500. Ising Model QFT Operations spent on magic state distillation: 99.4% Operations spent on distillation (percentage) Common Kernel *Quantum Fourier Transform with size 100. Operations spent on magic state distillation: 99.8% T-gate Percentage

  5. MAGIC-STATE DISTILLATION Block Code Distillation Factory T T p2 T p T T “Distillation Factory” T

  6. COMMUNICATION VIA BRAIDING A Distance does not matter.

  7. COMMUNICATION VIA BRAIDING B A C Crossing is prohibited.

  8. COMMUNICATION VIA BRAIDING Fewer crossings?

  9. OBJECTIVE Mapping

  10. Our Techniques for Congestion Minimization

  11. TECHNIQUES Mapping

  12. TECHNIQUES Concatenate and Arrange Cost of Permutation Step 78% 66% 48% 48% 28% 4 16 36 64 100

  13. TECHNIQUES Force-Directed Annealing 1 Vertex-Vertex Attraction 2 Edge-Edge Repulsion 3 Magnetic Dipole Source: http://jsfiddle.net/4sq4F/

  14. Vertex-Vertex Attraction

  15. FORCE-DIRECTED ANNEALING Vertex-Vertex Attraction Calculated with cycle-by-cycle simulation

  16. Edge-Edge Repulsion

  17. FORCE-DIRECTED ANNEALING Edge-Edge Repulsion

  18. Magnetic Dipole + + - - - + -

  19. FORCE-DIRECTED ANNEALING Magnetic Dipole Rotation

  20. FORCE-DIRECTED ANNEALING Valiant-Style Routing Intermediate hops

  21. RESULTS Multi-Level Factories 5.6x overhead reduction

  22. Conclusion • Magic-state distillation extremely dominates most applications’ workloads. • Surface code braiding circuits are difficult to execute. • Circuit latency and edge crossings are strongly correlated. • Force-directed annealing heuristics generate low-latency qubit mappings. • Hierarchical stitching optimizes multi-level circuits

  23. Thank you! Magic-State Functional Units: Mapping and Scheduling Multi-Level Distillation Circuits for Fault-Tolerant Quantum Architectures. Ding, Y., Holmes, A., Javadi-Abhari, A., Franklin, D., Martonosi, M., & Chong, F. T. (2018).  arXiv preprint arXiv:1809.01302.

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