High-Performance Poly-Si TFTs Fabricated by Implant-to-Silicide Technique - PowerPoint PPT Presentation

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High-Performance Poly-Si TFTs Fabricated by Implant-to-Silicide Technique

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  1. High-Performance Poly-Si TFTs Fabricated by Implant-to-Silicide Technique IEEE ELECTRON DEVICE LETTERS, VOL. 26, NO. 3, MARCH 2005 陳宜琳

  2. What is ITS (Implant To Silicide): S/D的摻雜是利用離子佈植的方式,形成ultra short shallow S/D extension (SDE)。而由此形成的TFT,稱之為FSD TFT (Fully silicided S/D TFT)。 Why we use ITS: 為了要整合週邊驅動電路在同一塊玻璃基板上,我們需要高 比值(TFT device more and more smaller)。ITS技術,其製程簡單,且在約600 , 快速形成ultra short shallow SDE,此ultra short shallow SDE能降低短通道效應及降低寄生電阻。

  3. FSD TFT by ITS: 優點: • 因為極淺的S/D→較好的短通道特性,但阻值高 。 • 因為極短的S/D→有效減低寄生電阻 。 • 製程簡單,植入後的回火處理(利用RTA)時間 較短,且摻雜物的擴散速度快→產量高。 • 因為做S/D的佈植時,不會損害Poly-Si layer即表面defect較少→接面漏電流較小(Qot少)。 • 因為使用RTA回火→Thermal Budget較低。

  4. FSD TFT 與 conventional Poly-Si TFT(CN TFT)比較

  5. FSD TFT process: Step 1:dep. a-Si for 45 nm at 550 using LPCVD. a-Si Substrate Step 2:the a-Si layer was recrystallized by SPC at 600 for 24h in then etching. Poly-Si Substrate

  6. Poly-Si gate Step 3:a 45 nm CVD gate oxide and a-Si layer 100 nm were deposited then etching. Gate oxide Poly-Si Substrate Step 4:dep. a 100 nm CVD oxide layer and anisotropically etched to form a sidewall spacer abutting the poly-Si gate. Poly-Si gate Gate oxide Poly-Si Substrate Sidewall spacer (oxide)

  7. P ions Ni-silicide Step 5:dep. a thin Ni layer 22 nm by RTA at 500 for 40s to form the FSD and wet etching (SPM→ 3:1). Poly-Si gate Ni-silicide Gate oxide Poly-Si Poly-Si gate Substrate Gate oxide Poly-Si Substrate Ni-silicide SDE Ni-silicide Poly-Si gate Gate oxide Poly-Si Substrate Step 6:implant P ions at 30 KeV. P ions were diffused out of silicide to form an ultrashort SDE by a low-temperature RTA at 600 for 30s in . (P原子在Ni silicide中的溶解度很低,其擴散及堆積在silicide表面形成SDE )

  8. (Transfer characteristics) 特性均變較佳 (Device characteristics) 特性: 線性區 = 0.1V 飽和區 = 5V

  9. 下圖顯示(線性區),在閘極加不同的偏壓,描繪每一條曲線,最後會交集在同一點,即為 。下圖為FSD TFT。CN TFT亦使用同樣方式可求得 為20k 。 (Out characteristics) 上圖顯示,FSD比CN有較大的driving current,尤其是在越大的閘極偏壓下;因為越大的閘極偏壓,其通道的電阻值越小。 (The width-normalized ON resistance)

  10. (短通道效應- roll off)

  11. 結論 • 利用ITS方法製作的TFT性質比CN TFT還要好。最大好處在於ultra short shallow S/D extension結構,使擁有較好的短通道特性及低的寄生電阻;而且製程簡單(成本低)、快速(產量高)、並且短時間的製程(回火時間短,熱預算即小)。