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ECE 477 Design Review: Team 2  Fall 2010

ECE 477 Design Review: Team 2  Fall 2010. Andrew Phillips, Ben Laskowski , Shannon Abrell , Rob Swanson. Outline. Project overview Project-specific success criteria Block diagram Component selection rationale Packaging design Schematic and theory of operation PCB layout

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ECE 477 Design Review: Team 2  Fall 2010

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  1. ECE 477 Design Review:Team 2  Fall 2010 Andrew Phillips, Ben Laskowski, Shannon Abrell, Rob Swanson

  2. Outline • Project overview • Project-specific success criteria • Block diagram • Component selection rationale • Packaging design • Schematic and theory of operation • PCB layout • Software design/development status • Project completion timeline • Questions / discussion

  3. Project Overview eV-TEK, or Telemetry for Electric Karts, is a tool for collecting and transmitting electric go-kart parameters in a race situation. The collected data can help the driver and pit crew optimize vehicle performance and ultimately win races.

  4. Project-Specific Success Criteria • An ability to report the approximate number of laps remaining on a given battery charge • An ability to detect and report cell voltage anomalies • An ability to sense and display kart speed • An ability to track the number of laps completed • An ability to log and display vehicle telemetry data

  5. Block Diagram

  6. Component Selection Rationale • Op-Amps – LM324 • Operates from single 5v supply • Low supply currents (700μA per amplifier) • Low cost • Current sense amp – INA148 • Inputs need not be referenced to circuit ground • Large common-mode input voltage range • External ADC – MCP3204 • Needed extra ADC channels • This IC inexpensive and meets speed/resolution needs

  7. Component Selection Rationale, cont’d • Battery Management Micro – PIC18F4423 • 13 ADC channels w/ 12-bit resolution • Easily obtained • Mature technology (few silicon errata items) • Main Micro – PIC32MX575F256L • 6 UARTs, product familiarity • Wireless – XBee Pro 900MHz • 6 mile range, sufficient data transfer speed

  8. Packaging Design • Main Packaging • Aluminum • Aerodynamic • Sits in front of driver on roll cage • Detachable faceplate holds main board • Driver displays • Wiring connection at rear

  9. Packaging Design • Battery Management • Stand-alone package • Plastic case provides electric isolation • Slots for battery leads and serial line to main controller

  10. Schematic/Theory of Operation • Voltage Follower • Acts to increase input impedance of ADC channels • Allows the use of large divider resistor values for low current drain

  11. Schematic/Theory of Operation • Battery Micro • Digitizes and scales battery voltages via simple code • Integrates current flow over time to obtain battery charge

  12. Schematic/Theory of Operation • External ADC • Used to increase number of ADC channels available • Interfaces to battery microcontroller over SPI

  13. Schematic/Theory of Operation • Main microc0ntroller • Can run up to 80MHz = 80MIPS • Collects and processes data from battery packs and sensors; logs; transmits to pit area

  14. Schematic/Theory of Operation • Power supply • Converts 12V to 5V and 3.3V • High-efficiency switchmode regulator for 12->5V conversion • Linear LDO for 5->3.3V • Maximum power dissipation ~2.4W • Large copper pours on PCB for heatsinking

  15. Schematic/Theory of Operation • Optical isolation • Battery monitors float with respect to main control board • 1kV of isolation provided; we require ~50V of isolation • Servo motors also isolated “just in case” • Side benefit: 3.3V<->5V conversion

  16. Schematic/Theory of Operation • XBee module • Appears as serial port to PIC32 • Hardware flow control pins used to minimize risk of buffer overflow

  17. Schematic/Theory of Operation • LED Drivers • TLC5917 • Similar to 74HC595 but includes constant-current output drivers • Ease PCB routing – 3 wire bus instead of 13

  18. Schematic/Theory of Operation • USB-Serial converter • Makes USB appear as UART for PIC32 • Eases software, PCB layout • Mature product, most errata fixed by manufacturer

  19. Schematic/Theory of Operation • DataFlash IC • 2MB EEPROM-like device for data logging • Simple SPI interface; faster and more versatile than SD card • Data made available for download via USB interface

  20. PCB Layout – Battery Monitors • Voltage followers • Mostly uninterrupted ground plane for noise rejection • Decoupling capacitor very close to op-amps – vital for stability

  21. PCB Layout – Battery Monitors • Current monitor • Completely uninterrupted ground plane • Voltage reference IC and decoupling caps very close to op-amp

  22. PCB Layout – Battery Monitors • Digital components • Separated from analog components • As many extra micro pins as practical padded out • Decoupling capacitors as close as practical to each power pin

  23. PCB Layout – Battery Monitors • Power supply • Linear LDO regulator • Expected power dissipation ~100mW • Bulk capacitor located nearby for stability

  24. PCB Layout – Main Board • Microcontroller • Decoupling capacitors located physically and electrically close to chip • Every pin is padded out for debugging and/or expansion • Pads provided for precision oscillator module, though it should not be required

  25. PCB Layout – Main Board • Power supply • Switching regulator is on top of continuous ground plane, and high dI/dt nodes are very short • Linear regulator has many vias to copper plane for heatsinking • Sufficient capacitance nearby for low ripple

  26. PCB Layout – Main Board • Optical Isolation • Physically separate from most other critical interfaces • Keepout areas near battery connectors – physical isolation is several times what is required

  27. PCB Layout – Main Board • Xbee • Antenna connection is as far from other components as possible • Capacitor located nearby to provide current pulses during RX->TX mode switches

  28. PCB Layout – Main Board • LED Drivers • Located directly underneath 7-segment LED modules for compactness

  29. PCB Layout – Main Board • USB UART • Trace length from USB connector is minimized to preserve differential nature of bus • Decoupling capacitors located as close as possible

  30. PCB Layout – Main Board • EEPROM • Located under PIC32 for layout convenience and to minimize length of high-speed SPI traces • Decoupling capacitor nearby

  31. Software Design/Development Status • Battery monitors • Software is essentially done • Need mechanism to calibrate measurements • Preliminary tests indicate this will be easy • Roughly 400 lines of well-commented assembly code

  32. Software Design/Development Status • Main controller • Began reading up on various microcontroller features (DMA, interrupt mechanism) • Installed and began experimenting with C compiler • Simple programs compile successfully

  33. Project Completion Timeline

  34. Questions / Discussion

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