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Cartigny Layout Discussion

Cartigny Layout Discussion. (Tim). Origin. ITK inspired layout studies aimed at replacing ‘utopia’ with something better... See Elsing talk at AUW https:// indico.cern.ch/getFile.py/access?contribId=203&sessionId=60&resId=0&materialId=slides&confId=158038 Cartigny Meeting 7/3/12

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Cartigny Layout Discussion

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  1. Cartigny Layout Discussion (Tim)

  2. Origin • ITK inspired layout studies aimed at replacing ‘utopia’ with something better... • See Elsing talk at AUW • https://indico.cern.ch/getFile.py/access?contribId=203&sessionId=60&resId=0&materialId=slides&confId=158038 • Cartigny Meeting • 7/3/12 • https://indico.cern.ch/conferenceDisplay.py?confId=177242 • Considerations • Number of hits 11/14 (eliminate holes in coverage) • Pt resolution (maximise radius of last point • Minimise extrapolation distances between layers (

  3. The Physicist View

  4. Implications • Z stave of 1270mm-> 13 modules • Stub layer (2 modules long) • Barrel Radii:- • 415, 555, 700, 830, 915, 1000 • Barrel/endcap gap (active-active) or 140mm • Realism strikes back..... • IW / GV presentation to ITK-SC (8/5/12) – John Noviss’ work • See https://indico.cern.ch/getFile.py/access?contribId=4&sessionId=0&resId=1&materialId=slides&confId=187905

  5. Tim’s Work

  6. Issue • Need to keep track of what’s going on.... But • Mustn’t forget (get too deflected) from thinking about what a 130nm ASIC stave might be like! Eg..... • Thickness • The core COULD be as thin as 3mm reducing the envelope by 2mm (>10%) • Is the insertion envelope correct (could need to be greater?) • DCDC converters • Design of SMC area • Width • DCDC integration • SMC width • Need to keep things consistent.... • We URGENTLY need some way of compile lists of hard and ‘soft’ specifications and DOCUMENT progress.

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