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This study explores the challenges of increasing Magnetic Tunnel Junction (MTJ) density in transistors sharing an axis. It focuses on writing logic "0" and "1" by adjusting the currents (Ipar) for MTJ states (AP and P). It is highlighted that while sufficient margin exists for writing "0," there is a significant constraint preventing successful writing of "1" due to MTJ disturbance concerns. The results summarize that sharing axis transistors is not feasible under current conditions, emphasizing the need for alternative approaches in MTJ integration.
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Increasing MTJ Density Analysis of Sharing Axis Transistors (2 MTJs)
Writing a “0” (Rp) Ipar > 0 and MTJ2 is AP Iwrite Ipar < 0 and MTJ2 is P Itran Ipar Constraints so we don’t disturb MTJs not on the WL
Writing a “1” (Rap) Ipar > 0 and MTJ2 is P Iwrite Ipar < 0 and MTJ2 is AP Itran Ipar Constraints so we don’t disturb MTJs not on the WL
Conclusion • Sharing of Axis transistors is not possible! • Plenty of margin for writing a “0” • Zero margin for writing a “1”