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Internal architecture of 8086/8088 CPU

Internal architecture of 8086/8088 CPU. 计算机学院 李征 Tel ： 13882153765 Email ： lizheng@cs.scu.edu.cn OICQ: 1340915. Internal Architecture of 8088. Address adder. 20 位. ∑. AH AL. BH BL. CH CL. 8 位. CS. General Register. DH DL. DS. SP. I/O Control. SS. BP. ES.

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Internal architecture of 8086/8088 CPU

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  1. Internal architecture of 8086/8088 CPU 计算机学院 李征 Tel：13882153765 Email：lizheng@cs.scu.edu.cn OICQ: 1340915

  2. Internal Architecture of 8088 Address adder 20位 ∑ AHAL BH BL CH CL 8位 CS General Register DH DL DS SP I/O Control SS BP ES SI IP System Bus DI 内部暂存器 16位 Execution Control 1234 ALU 8位 指令队列 (Instruction Queue) Flag Register 执行部件 （EU) 总线接口部件 （BIU)

  3. EU and BIU • There are two units in 8086/8088 CPU, which are Execute Unit (EU) and Bus Interface Unit (BIU). • EU: Automatically executing the instructions in instruction queue.

  4. EU and BIU • BIU: • 1) In instruction reading cycle, reading the instructions from memory to instruction queue. • 2) In instruction execution cycle, operating (read or write) dada in memory cell or I/O port.

  5. EU and BIU • If the current instruction executed by EU do not use system bus, • BIU can read successive instruction from memory synchronously.

  6. EU and BIU • The reading cycle of successive instruction can overlap the execution cycle of current instruction. • The architecture with EU and BIU is a simple pipeline (流水线). • Question: • When will the pipeline break? Program transfer

  7. BIU • (1) I/O Control Circuit • Connected with system bus • Controlled by Execution Control • When bus operation occurs, it interacts with system bus with address, data and control signals

  8. BIU • (2) Instruction Queue • Instructions which BIU read from memory are stored here one by one • EU read instructions for execution one by one from here

  9. BIU • (3) Address Adder • Transform logic address of memory cell to physic address

  10. Physic address • 8086/8088 has 20 address pins, and its addressing range is 220 bytes (1M bytes). • The address with 20 bits on the address bus is called physic address.

  11. Logic address • Logic address only appears inside 8086/8088 CPU. • Instructions can only use logic address. • Segment Base Value (段基值，16 bits) : Offset (偏移量，有效地址，EA, 16 bits) • Segment Base Address (段基址，20 bits) = Segment Base Value * 16

  12. Transform logic address to physic address • Physic Address (20 bits) = • Segment Base Value * 16 + Offset

  13. 地址加法器 20位物理地址 HEX xxxx0 xxxx + xxxxx xxxx0 20位段基址 16位偏移量 发送至地址总线 xxxx xxxx 16位段基值

  14. Why not use physic address directly? • The word length of 8086/8088 CPU is 16 bits. • In other words, the register in CPU is 16 bits register. • However, the address bus has 20 address lines.

  15. Transform logic address to physic address • Example： Logic Address Memory cell（Byte） Physic Address 10000H SEG=1000H 10001H 10002H 10003H OFFSET=0004H 10004H 10005H 10006H

  16. Execute Unit • (1) Execute Control Circuit: • Automatically read instruction from queue • Decode instruction and generate control signals • Send control signals based on temporal logic prescribed by instruction

  17. Execute Unit • (2) ALU (Arithmetic and Logic Unit) • Execute arithmetic or logic operation prescribed by instruction • Arithmetic operation: +, -, *, / of integer • Logic operation: and, or, not, xor of bool • 8088 can only operate integer, can not operate float. (float operation executed by 8087)

  18. Registers in 8086/8088 • (1) Segment Registers • (2) Address Pointer Registers • (3) Data Registers • (4) Flag Register

  19. Segment Registers • Segment base values are stored in these registers. • When address transformation (logic to physic) occurs, segment register provide segment base value to address adder.

  20. Segment Registers • There are four segment registers in 8086/8088 CPU: • CS (Code Segment) • DS (Data Segment) • SS (Stack Segment) • ES (Extra Segment)

  21. Segment Management • Instructions (program) are stored in code segment. • Variables used by program are stored in data segment. • Return points (address) of procedure or interrupt service routine are stored in stack segment.

  22. Address Pointer Registers • Offset (Effective Address) of logic address is stored in address pointer registers. • Address pointer registers can provide offset to address adder.

  23. Address Pointer Registers • There are six address pointer registers in 8086/8088. • BX (Base Index) • BP (Base Pointer) • SI (Source Index) • DI (Destination Index) • SP (Stack Pointer) • IP (Instruction Pointer)

  24. Address Pointer Registers • BX, BP, SI, DI can store offset or offset element. • Generally, DS and ES provide segment base value for BX, SI, and DI. • Generally, SS provides segment base value for BP. • In string operation instruction, SI is only used with DS, and DI is only used with ES.

  25. Address Pointer Registers • SP and IP store offset, not offset element. • Only SS can provide segment base value to SP, and SP always points to stack top. • Only CS can provide segment base value to IP, and IP always points to the next instruction which BIU will read.

  26. Data Register • There are four data registers in 8086/8088. • Data registers provide binary data for ALU. • AX (Accumulator) • BX (Base Index) • CX (Counter) • DX (Data Register) • Notice: BX is both address pointer and data register.

  27. Data Register • Each data register can be regarded as two 8-bit registers. • AX: AH, AL • BX: BH, BL • CX: CH, CL • DX: DH, DL • Note: Logically AX, AH, and AL are different registers, but AX overlap AH and AL physically.

  28. Flag Register • Flag register (FR) is a special 16-bit register. • Each bit of this register has individual and different meaning, and it is called as flag. • There are two kind of flags in FR, which are status flags and control flags.

  29. Status Flags in FR • CF (Carry Flag) • OF (Overflow Flag) • PF (Parity Flag) • AF (Auxiliary Flag) • SF (Sign Flag) • ZF (Zero Flag) • These flags are affected by ALU.

  30. Status Flags in FR • Instructions do not affect status flags directly, • but arithmetic and logic operation instructions often affect them indirectly. • For example: • ADD AL, BL ; FR is affected indirectly

  31. Status Flags in FR • Arithmetic and logic operation instructions write the status flag to represent the status of operation result. • Program transfer instructions read the status flag to realize the branch or loop structure in program. • The status flags are necessary hardware support for branch or loop structure in program.

  32. Status Flags in FR • If a status flag is valid, the following conditions must be satisfied. • 1) One instruction executed must have affected this flag. • 2) This affection must be valid. • 3) Programmer’s explanation about Operation data must be consistent with this flag.

  33. Carry Flag (CF) • In most cases, programmer concern CF in addition or subtraction instructions. • Addition or subtraction instructions can provide valid effect to CF.

  34. Carry Flag (CF) • However, if CF is expected to use, • programmer must regard operation data in last addition or subtraction as unsigned number, • except operation data is not integral, and last operation is not the final one.

  35. Understanding Non-integral Operation • Consider a 16-bit addition, when CPU execute it with two 8-bit addition instruction, it will execute lower 8-bit addition first. • When CPU process the lower 8-bit code, does it know this is not an integral code? NO Then who knows? The programmer know it exactly, and this knowledge is presented in the flag usage in his (her) program.

  36. Carry Flag (CF) • Meaning: • In last addition or subtraction, if there is carry or borrow at the highest bit (7th bit of byte, or 15th of word), CF=1. • Or else, CF=0.

  37. Carry Flag (CF) • For example: • 10110011 • + 01010001 • 1 00000100 • CF =1

  38. Carry Flag (CF) • For example: • 00110000 • + 00001101 • 0 00111101 • CF=0

  39. Carry Flag (CF) • For example: • 01010101 • - 00111110 • 0 00010111 • CF=0

  40. Carry Flag (CF) • Example of False judgment: • [-00111110]补= 11000010 • 01010101 • + 11000010 • 1 00010111 • CF=1? • No, this is unsigned number operation, remember?

  41. Carry Flag (CF) • In modern microcomputers, subtraction is realized by addition of complementary codes. • However, the generation circuit of CF is not correspondent with this operation.

  42. Application of CF • (1) In last operation which affected CF, if the operation data is integral, CF can present if there is overflow of unsigned data. • (2) In long data operation (not care what data code), CF can join the lower-bit and the higher-bit operation.

  43. Application of CF • Important: CF is the physic base for long data (longer than CPU word) operation. • (3) CF can be used to judge the relation between two unsigned code. (<, >, =) • (4) In bit shift operation, CF is used to store the last bit shift out from a cell.

  44. Parity Flag (PF) • If an arithmetic or logic instruction affected PF, • and the number of ‘1’ is even in the lowest 8 bits of the operation result, PF=1. • Or else, PF=0.

  45. Application of PF • Example: • ASCII code of character is 7-bit. • The 7th bit can be used as verifying bit. • Adjust 7th bit of ASCII code, and ensure the number of “1” in code is odd. (Odd Verifying)

  46. Application of PF • Send this code to another computer with network. • The receiver can verify the correctness of this code by following instruction, if the code is in AL register. • ADD AL, 0

  47. Auxiliary Carry Flag (AF) • AF represent the carry of addition or borrow of subtraction, just like CF. • However, it represent the carry or borrow at 3th bit of operation result. • So, AF is also called half carry flag. • Note: Some instruction may provide AF invalid effect. (may be changed, but not valid)

  48. Application of AF • BCD code: A kind of binary code to represent decimal data • Use 4 bit to represent one single digit of decimal data. • Limit the range by 0000~1001 (0~9)

  49. Application of AF • AF can represent the carry or borrow from lower BCD code to higher one (also a hex carry or borrow). Carry 7 6 5 4 3 2 1 0 Borrow

  50. Application of AF • If the binary (hex) carry or borrow can be adjust to decimal, • the binary (hex) operation can also be transformed to decimal. • AF is necessary for BCD adjustment instructions.

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