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Emanuel Pollacco IRFU/SPhN For the GET collaboration. Systems for Nuclear Physics Today N umber of Channels Approx. 1,000 Short & Reconfigurable Experimental Setups with variety of Detector Types Human & Financial Resources Low Systems for Nuclear Physics Tomorrow
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Emanuel Pollacco IRFU/SPhN • For the GET collaboration
Systems for Nuclear Physics Today • Number of Channels Approx. 1,000 • Short & Reconfigurable Experimental Setups with variety of Detector Types • Human & Financial Resources Low • Systems for Nuclear Physics Tomorrow • Number of Channels Approx. 20,000 • Short & Reconfigurable …. • Human & ... • Measure • TPC, Si, CsI … (E & T via Charge Sampling), • Efficient Trigger • 1000 events/sec (TPC like) Adapting Part. Phys. Techniques
Active Target - 20Kch & Si 4pi – 12K ch Bragg trace measure
Systems to becovered by GET • ProjectsemployingGET • ACTAR ( GANIL, IRFU, IPNO, SFTC, …) – Micromegas + Si – 20k channels • 2p-TPC (CENBG) – GEM/Micromegas – 20k channels • AT-TPC (MSU, LBL …) – Micromegas – 12k channels • GASPARD (GANIL, IRFU, IPNO, ... ) – Si & CsI – 15k channels • BTD (IRFU & GANIL) – 100 channels • SAMÜRAI-TPC (RIKEN) – Micromegas -15k channels • FORFIRE – IRFU – Industry • Test system - IRFU • Under Study use of GET/ GET modules • S3 – (SPIRAL2+IRFI+…) – Si/gastracker - 500 channels • MINOS (p;2p, g) - (IRFU)– Micromegas - 8K channels • FIDIAS (IRFU) – Micromegas 5K Channels (IRFU) 100 K Channels Gas, Si & CsI GENERIC • Emanuel Pollacco IRFU/SPhN
GET Project Objectives • Develop for Nucl. Physics :- Full Data Acquisition system for • Active Targets(Target = Gas). Nucl. Spec & Astrophys. with Radio active Beams • TPC Exotique Decay & EoS with RABs Require • Low detection thresholds (A,Z, E, The, Phi) for slow ions ( below 300KeV), • Dynamic range (~Z²), • High Luminosity & Solid Angle, • Effective Internal TPC Trigger, • Gas & pressure (H2, D2, 3He, He … ) • Different detector Systems, • Pad density (25-100 pads/cm2) • Opportunity to develop a generic /reconfigurable systemapproach for Nucl. Phys. to cover medium size systems (256 – 32K channels). This is an experimental system
GET Project R&D Financed 75% (France) 25% (US) 2010 2009 2012 2013 ASIC 2 ASIC 1 Beam Test Beam Test Con. Design Sys. Proto 1 Sys. Proto 2 Production Cards
Embedded Systems: T. Stamp/ 0-suppress/Formatting/reduction/ Calibration Slow Control SYSTEM GET Conceptuel Design FARM L-3 Event-Building Data Control S. Control Web Services Security Very FE Pre-amp/ Protection µ-TCA AsAdASIC ADC FPGA PULSER T/V/I CoBo FPGA + Memo PAC AT -TPC Mutant Trigger FPGA Front-End Stab./Security Coding 3Levels Trigger Clock • Emanuel Pollacco IRFU/SPhN
SYSTEM GET Conceptuel Design µ-TCA AsAdASIC ADC FPGA PULSER T/V/I CoBo FPGA ZAP-PAC ACTAR Mutant Trigger FPGA • Emanuel Pollacco IRFU/SPhN
Asic AGET c510 c510 c511 c511 c0 c0 c1 c1 c. c. ci-2 ci-2 ci+2 ci+2 ci-1 ci-1 ci+1 ci+1 ci ci Generic CMOS 0.35µm Int./Ext. PAC &/or Filter Gain & Disc/channel120, 240 fC, 1, 10 pC. Shaping 50-1000 nsec Sampling rate 1-100Mhz 25MHz ADC 12/14bits SelectiveReadout – Hit Reg. Windowed SCA readout128/256/512 or variable 2fasttime-consequative SCA windows Pulser facilities Spy Pulser DISC HIT Reg. CoBo Ana. Mem. ADC Mulx PAC Filter X64 Trigger Mutant Trigger FPGA Or X64 PAC Filter • Emanuel Pollacco IRFU/SPhN
AGET: Charge Channel • Some numbers: Simulation results Charge resolution:versus input capacitor and peaking time 11
EMC, Connectors, Cables,Temp. Monitoring& Security CoolingStudy CEM Study SAMÜRAI -TPC µ-TCA AsAdASIC ADC FPGA PULSER T/V/I CoBo FPGA Mutant Trigger FPGA Power Supplies Study Power SPY-BOX • Emanuel Pollacco IRFU/SPhN
Band Width & Trigger • Common Dead Time • Or • Individual AsAd Dead-Time 103Hz 10 Gbit 1.2GBit X4 AsAd 1GBit X10 CoBo µ-TCA AsAdASIC ADC FPGA PULSER T/V/I CoBo FPGA Mutant Trigger FPGA GASPARD BuTiS/GTS/Centrum/ … • Emanuel Pollacco IRFU/SPhN
MUTANT (Multiplicity Trigger and Time stamp) Nucl. Phys. Have Limited Experience Scenarios/Simul. 4-level triggers L0: External trigger L1: Time dependent Multip. trigger Self Trigger, … L2: Hit Pattern trigger Self Trigger, calculated read pattern … L3: Soft trigger Compute the digital trigger from CoBos (25MHz) Time stamp (48b, 10ns) and eventN°(32b) Distribute the 100MHz clock for the synchronisation Number Of Buckets: NOB_H Number Of Buckets: NOB_L Trigger Building Data Transfer ASIC-AGET MTH HIT Reg. CoBo ADC Mulx MTL Mutant Trigger FPGA Trigger
Shebli ANVAR, CEA Irfu Global View of DAQ Hardware Infrastructure External Systems Point-to-point Offline Analysis CoBo CoBo CoBo CoBo CoBo CoBo CoBo FPGA SystemonChip SystemonChip SystemonChip FPGA FPGA SystemonChip SystemonChip FPGA FPGA SystemonChip FPGA FPGA SystemonChip RAM RAM RAM RAM RAM RAM RAM Ethernet 10 Gb Network Switch Global Network Ethernet 1000 Ethernet 1000 Ethernet 1000 Ethernet 1000 Ethernet 1000 Ethernet 1000 Ethernet 1000 EmbeddedProcessor EmbeddedProcessor EmbeddedProcessor EmbeddedProcessor EmbeddedProcessor EmbeddedProcessor EmbeddedProcessor Memory bus Memory bus Memory bus Memory bus Memory bus Memory bus Memory bus Data Server Control &Monitoring Control(I2C, etc.) Control(I2C, etc.) Control(I2C, etc.) Control(I2C, etc.) Control(I2C, etc.) Control(I2C, etc.) Control(I2C, etc.) Computer Farm
Software/Firmwaredevelopments Data Base ORACLE Data Base ORACLE Data Base ORACLE Electronics Control Core ECC GUI COBO SC Server MUTANT/BEMSC Server COBOAcquisitionNode RC GUI GET Run Control Core Back EndAcquisition Node • Multi-Platform framework • Fully Object Oriented Client-Server design architecture. • ICE & SOAP middleware. • Evolutive Data Formats. • Software Debbuging/Simul. Tools. • NARVAL for data management • (– ADA, TCP/IP). Data Filtering (Farm) Acquisition Nodes Data Storage S. Anvar, GET coll.
Reconfigurable Approach Via:- Hardware - Software Architecture Documentation & Simulation tools µ-TCA AsAdASIC ADC FPGA PULSER T/V/I CoBo FPGA PAC Genericity Multi-Platform (Linux, VxWorks, Windows, Mac) framework Fully Object Oriented Client-Server design architecture. ICE & SOAP middleware. Evolutive Data Formats. Software Développement /Debbuging/Simulation Tools. NARVAL for data management (NARVAL – ADA, TCP/IP). Mutant Trigger FPGA • Emanuel Pollacco IRFU/SPhN
Shebli ANVAR, CEA Irfu Control, Acquisition & Online Processing Chain Detection Channel Digitization Readout & formatting Configuration and Control Monitoring Buffering & Routing Online Processing Storage Hardware Data Flow Offline Processing Firmware Control Flow Software
Shebli ANVAR, CEA Irfu Embedded Implementation (Upstream) Digitization Digitization Allows use of standard multi-Gb switches for data concentration and routing Digitization(ASIC+ADC+…) FPGA SystemonChip RAM Ethernet 100 Ethernet 1000 EmbeddedProcessor Memory bus Control(I2C, etc.)
NumberChannelling 1024 1024 1024 256 10240 1 – 32,000 256 1024 10240 256 1024 10240 256 1024 TRIG µ-TCA AsAdASIC ADC FPGA PULSER T/V/I CoBo FPGA PAC Mutant Trigger FPGA AT-TPC Channel Number – canbeincreased • Emanuel Pollacco IRFU/SPhN
GET Overview Front-end boards Asic+ADC HV, I, T monitoring Data Readout & Trig Zero suppress Time stamp 3-Level trigger DAQ & Slow control Run control Online analysis Electronics control Event builder Run control Ext preamp ZAP AGET ADC Readout Signal process NARVAL Event analysis Storage Gb transfer ASAD CoBo ECC Config manager Clock distrib Trigger L0-2 Inspection box time alignment (Riken) Spy box MUTANT Process L1 -> L2 Data base SLOW CONTROL Time reference (GSI Butis) Clock provider DAQ Micro-TCA standard